| Commit message (Expand) | Author | Age | Files | Lines |
* | i965/disasm: Fix INTEL_DEBUG=fs on Broadwell for ARB_fp applications. | Kenneth Graunke | 2014-06-30 | 1 | -1/+1 |
* | i965/disasm: Delete gen8_disasm.c. | Kenneth Graunke | 2014-06-30 | 3 | -1031/+0 |
* | i965/disasm: Stop using gen8_disassemble in favor of brw_disassemble. | Kenneth Graunke | 2014-06-30 | 8 | -42/+8 |
* | i965/disasm: Improve render target write message disassembly. | Kenneth Graunke | 2014-06-30 | 1 | -30/+47 |
* | i965/disasm: Rename msg_target to SFID. | Kenneth Graunke | 2014-06-30 | 1 | -12/+8 |
* | i965/disasm: Fix typo in RT UNORM write message. | Kenneth Graunke | 2014-06-30 | 1 | -1/+1 |
* | i965/disasm: Use Gen6+ SFID case labels. | Kenneth Graunke | 2014-06-30 | 1 | -2/+4 |
* | i965/disasm: "Handle" Gen8+ HF/DF immediate cases. | Kenneth Graunke | 2014-06-30 | 1 | -0/+7 |
* | i965/disasm: Cut piles of duplicate swizzle printing. | Kenneth Graunke | 2014-06-30 | 1 | -89/+26 |
* | i965/disasm: Properly decode negate source modifiers on Broadwell. | Kenneth Graunke | 2014-06-30 | 1 | -4/+49 |
* | i965/disasm: Improve disassembly of atomic messages on Haswell+. | Kenneth Graunke | 2014-06-30 | 1 | -7/+21 |
* | i965/disasm: Actually disassemble Gen7+ URB opcodes. | Kenneth Graunke | 2014-06-30 | 1 | -3/+19 |
* | i965/disasm: Decode Broadwell's invm/rsqrtm math functions. | Kenneth Graunke | 2014-06-30 | 1 | -0/+2 |
* | i965/disasm: Properly disassemble the "atomic" ThreadCtrl value. | Kenneth Graunke | 2014-06-30 | 1 | -2/+3 |
* | i965/disasm: Properly disassemble all32h/any32h align1 predicates. | Kenneth Graunke | 2014-06-30 | 1 | -11/+13 |
* | i965: Add #defines for any32h/all32h predication. | Kenneth Graunke | 2014-06-30 | 1 | -0/+2 |
* | i965/disasm: Mark ELSE as having UIP on Gen8+. | Kenneth Graunke | 2014-06-30 | 1 | -0/+1 |
* | i965/disasm: Properly disassemble jump targets on Gen4-5. | Kenneth Graunke | 2014-06-30 | 1 | -0/+15 |
* | i965/disasm: Improve disassembly of jump targets on Gen6+. | Kenneth Graunke | 2014-06-30 | 1 | -18/+41 |
* | i965/disasm: Add support for new Gen8+ register types. | Kenneth Graunke | 2014-06-30 | 1 | -16/+24 |
* | i965: Restyle brw_disasm.c. | Kenneth Graunke | 2014-06-30 | 1 | -1234/+1231 |
* | i965/disasm: Create an "opcode" temporary. | Kenneth Graunke | 2014-06-30 | 1 | -31/+30 |
* | i965/disasm: Eliminate opcode pointer. | Kenneth Graunke | 2014-06-30 | 1 | -8/+7 |
* | Remove the ATI_envmap_bumpmap extension | Jason Ekstrand | 2014-06-30 | 2 | -2/+0 |
* | i965: Enable vertex streams up to MAX_VERTEX_STREAMS. | Iago Toral Quiroga | 2014-06-30 | 1 | -0/+4 |
* | i965: Implement GL_PRIMITIVES_GENERATED with non-zero streams. | Iago Toral Quiroga | 2014-06-30 | 2 | -7/+26 |
* | i965: Implement GL_TRANSFORM_FEEDBACK_PRIMITIVES_WRITTEN with non-zero streams. | Iago Toral Quiroga | 2014-06-30 | 1 | -4/+4 |
* | i965/gs: Set control data bits for vertices emitted in stream mode. | Iago Toral Quiroga | 2014-06-30 | 2 | -1/+51 |
* | i965/gs: Set number of control data bits for stream mode. | Iago Toral Quiroga | 2014-06-30 | 1 | -4/+5 |
* | i965: Enable transform feedback for streams > 0 | Iago Toral Quiroga | 2014-06-30 | 1 | -24/+43 |
* | i965: Enable compressed multisample support (CMS) on Broadwell. | Kenneth Graunke | 2014-06-26 | 1 | -8/+0 |
* | i965: Add 2x MSAA support to the MCS allocation function. | Kenneth Graunke | 2014-06-26 | 1 | -0/+1 |
* | i965: Hook up the MCS buffers in SURFACE_STATE on Broadwell. | Kenneth Graunke | 2014-06-26 | 1 | -0/+10 |
* | i965: Drop SINT workaround for CMS layout on Broadwell. | Kenneth Graunke | 2014-06-26 | 1 | -3/+1 |
* | i965: Add plumbing for Broadwell's auxiliary surface support. | Kenneth Graunke | 2014-06-26 | 1 | -7/+37 |
* | i965: Add auxiliary surface field #defines for Broadwell. | Jordan Justen | 2014-06-26 | 1 | -0/+10 |
* | i965: Disassemble all of DP write message control bits on Gen6. | Kenneth Graunke | 2014-06-26 | 1 | -1/+1 |
* | i965: Pass brw to brw_try_compact_instruction(). | Matt Turner | 2014-06-26 | 3 | -5/+4 |
* | i965: Add is_cherryview flag to brw_context. | Matt Turner | 2014-06-26 | 2 | -0/+2 |
* | i965: Add CSEL opcode definition for Gen8. | Matt Turner | 2014-06-26 | 1 | -0/+1 |
* | i965: Document which instructions are generation specific. | Matt Turner | 2014-06-26 | 1 | -20/+20 |
* | i965: Don't set UIP for ENDIF/WHILE. | Matt Turner | 2014-06-26 | 1 | -0/+4 |
* | i965: Replace struct brw_compact_instruction with brw_compact_inst. | Matt Turner | 2014-06-26 | 6 | -61/+24 |
* | i965: Convert brw_eu_compact.c to the new brw_compact_inst API. | Matt Turner | 2014-06-26 | 1 | -38/+44 |
* | i965: Introduce a new brw_compact_inst API. | Matt Turner | 2014-06-26 | 1 | -0/+90 |
* | i965: Replace 'struct brw_instruction' with 'brw_inst'. | Matt Turner | 2014-06-26 | 12 | -273/+223 |
* | i965: Throw out guts of struct brw_instruction. | Matt Turner | 2014-06-26 | 1 | -644/+1 |
* | i965: Convert brw_gs_emit.c to the new brw_inst API. | Matt Turner | 2014-06-26 | 1 | -3/+4 |
* | i965: Convert brw_disasm.c to the new brw_inst API. | Matt Turner | 2014-06-26 | 1 | -341/+316 |
* | i965: Pass brw rather than gen to brw_disassemble_inst(). | Matt Turner | 2014-06-26 | 5 | -33/+33 |