| Commit message (Collapse) | Author | Age | Files | Lines | |
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| * | r300: make blit code work on swtcl machines. | Dave Airlie | 2010-03-04 | 1 | -5/+18 |
| | | | | | | | | | Only tested this on my rv530 with R300_NO_TCL=1, but it works there at least. It would be nice to fix the tex_offset by chaning the vertex program on tcl to read from offset 6 but this isn't really necessary. Signed-off-by: Dave Airlie <[email protected]> | ||||
| * | r300_blit: initialise whole fp structure to 0 | Dave Airlie | 2010-03-04 | 1 | -0/+1 |
| | | | | | | | | at least on the r500 we get a lockup unless I do this, the compiler seems to fail to compile and we just get a null fp. Signed-off-by: Dave Airlie <[email protected]> | ||||
| * | radeon/r200/r300/r600: add check_blit vtbl function | Alex Deucher | 2010-03-03 | 14 | -15/+93 |
| | | | | | | | | | | Check if the native blit formats are supported, if not, attempt to use an alternate format. Skip 3, >4 bpp as per comments from mcencora on irc. Signed-off-by: Alex Deucher <[email protected]> | ||||
| * | Remove stray defines of HAVE_RGBA | Ian Romanick | 2010-03-03 | 12 | -12/+0 |
| | | | | | | | | Now that color-index support is removed from t_dd_tritmp.h and t_dd_unfilled.h, drivers no longer need define HAVE_RGBA. Signed-off-by: Ian Romanick <[email protected]> | ||||
| * | mesa: Remove ClearIndex and IndexMask from device-driver interface | Ian Romanick | 2010-03-03 | 6 | -18/+0 |
| | | | | | | | | | These are used to inform the driver of the clear value for color-index buffers and to control write-masking of bits in color-index buffers. No driver use or need (not even Nouveau) these interfaces. Signed-off-by: Ian Romanick <[email protected]> | ||||
| * | DRI: Remove support for color-index visuals | Ian Romanick | 2010-03-03 | 1 | -10/+5 |
| | | | | | Signed-off-by: Ian Romanick <[email protected]> | ||||
| * | DRI/swrast: Remove color-index support from DRI swrast driver | Ian Romanick | 2010-03-03 | 4 | -105/+27 |
| | | | | | | | | | | It appears that color-index rendering wasn't actually supported anyway. swrastFillInModes did not previously create an color-index configs, so it doesn't seem like there would be any way to get a color-index visual. Signed-off-by: Ian Romanick <[email protected]> | ||||
| * | i915: Use x,y drawing offsets instead of changing buffer offsets. | Eric Anholt | 2010-03-03 | 3 | -12/+41 |
| | | | | | This should fix rendering into mipmaps of tiled textures. | ||||
| * | i915: Tell the kernel when we actually need fence registers on our BOs. | Eric Anholt | 2010-03-03 | 4 | -12/+49 |
| | | | | | | | This improves tiled texture performance of OA on my 945 from 25.3fps to 29.0fps, whereas untiled is 28.2fps, by avoiding stalls for fence register changes. | ||||
| * | intel: Use drm_intel_bo_alloc_tiled for region allocs. | Eric Anholt | 2010-03-03 | 1 | -28/+11 |
| | | | | | | | | This moves the logic for how to align pitches, heights, and sizes of objects to one central location. Fixes rendering with texture tiling on i915. Note that current libdrm is required for the change for I915_TILING_NONE pitch alignment. | ||||
| * | i915: Don't do the pitch expansion for tiled buffers. | Eric Anholt | 2010-03-03 | 1 | -4/+4 |
| | | | | | | | | | The weirdness that led to the bumping of pitch for those 512/1024 pixels is that in taking a 2x2 subspan or bilinear filtering we'd end up hitting the same channel in 2 different pages, leading to lower performance. With tiling, that doesn't occur, so we don't need to waste the memory. | ||||
| * | intel: Use GTT mapping in the blit fallback path in case there's tiling. | Eric Anholt | 2010-03-03 | 1 | -15/+14 |
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| * | i965: Fix up Sandybridge VS sizing. | Eric Anholt | 2010-03-03 | 1 | -3/+5 |
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| * | r600: add new rs880 pci id | Alex Deucher | 2010-03-03 | 2 | -0/+2 |
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| * | intel: Set InternalFormat for renderbuffers created from an EGLImage | Kristian Høgsberg | 2010-03-03 | 1 | -0/+1 |
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| * | radeon/r200/r300/r600: fix blit BO buffer validation | Dave Airlie | 2010-03-03 | 4 | -18/+32 |
| | | | | | | | | | | there is no need for these to be persistent since we flush the CS at the end of the blit, and we don't reuse these buffers at all. on my r600 the Wine DX9 test suite doesn't crash at least anymore. Signed-off-by: Dave Airlie <[email protected]> | ||||
| * | intel: passs correct context type to intel_prepare_render() call | Brian Paul | 2010-03-02 | 1 | -1/+1 |
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| * | i965: include macros.h to get CLAMP macro | Brian Paul | 2010-03-02 | 1 | -0/+1 |
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| * | r600: fix blender picking. | Dave Airlie | 2010-03-02 | 1 | -3/+15 |
| | | | | | | | | | | | This fixes the sw fallback for GL_SELECT picking modes. Fixes object picking blender + depthpick test http://bugs.freedesktop.org/show_bug.cgi?id=26419 Signed-off-by: Dave Airlie <[email protected]> | ||||
| * | radeon: Reduce number of radeon_bo_map calls that require kernel entry. | Pauli Nieminen | 2010-03-01 | 1 | -3/+13 |
| | | | | | | | | | | | DMA buffers are often remapped many times for singel cs. To reduce number of mapping calls ending to kernel dma buffers are mapped when allocated and unmapped when full or in cs flush. This makes indifual mapping calls in other parts of code simple increment/decrement reference count which is faster than entering kernel. This improves Anholt's openarena benchmark from 36 fps to 44 fps. | ||||
| * | dri/nouveau: Combine the dummy texture more deterministically on nv0x. | Francisco Jerez | 2010-03-01 | 1 | -1/+4 |
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| * | dri/nouveau: Fix up the ADD texture environment on nv0x. | Francisco Jerez | 2010-03-01 | 2 | -2/+1 |
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| * | dri/nouveau: Add two stencil operation cases in nv04_state_raster.c. | Andrew Randrianasulu | 2010-03-01 | 1 | -0/+4 |
| | | | | | Signed-off-by: Francisco Jerez <[email protected]> | ||||
| * | dri/nouveau: Allow to render to XRGB8888 textures. | Andrew Randrianasulu | 2010-03-01 | 1 | -0/+2 |
| | | | | | Signed-off-by: Francisco Jerez <[email protected]> | ||||
| * | dri: Remove dead code. | Vinson Lee | 2010-02-27 | 2 | -36/+10 |
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| * | dri: Add assert to check for null pointer dereference. | Vinson Lee | 2010-02-27 | 1 | -0/+1 |
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| * | i810: Add assert to check for null pointer dereference. | Vinson Lee | 2010-02-27 | 1 | -0/+1 |
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| * | mach64: Add asserts to check for null pointer dereferences. | Vinson Lee | 2010-02-27 | 1 | -0/+3 |
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| * | mga: Add assert to check for null pointer dereference. | Vinson Lee | 2010-02-27 | 1 | -0/+1 |
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| * | r128: Add assert to check for null pointer dereference. | Vinson Lee | 2010-02-27 | 1 | -0/+1 |
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| * | r300: Add asserts to check for null pointer dereferences. | Vinson Lee | 2010-02-27 | 1 | -0/+2 |
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| * | savage: Add assert to check for null pointer dereference. | Vinson Lee | 2010-02-27 | 1 | -0/+1 |
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| * | sis: Add assert to check function pointer is not null. | Vinson Lee | 2010-02-27 | 1 | -0/+1 |
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| * | tdfx: Add asserts to check for null pointer dereferences. | Vinson Lee | 2010-02-27 | 2 | -0/+10 |
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| * | unichrome: Assert that pointer is not null before dereferencing. | Vinson Lee | 2010-02-27 | 1 | -0/+2 |
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| * | radeon: Assert pointer is not null before dereferencing. | Vinson Lee | 2010-02-27 | 1 | -0/+1 |
| | | | | | | Add back an assert that was removed in commit cd5f167353f16fb4f5b349002625b704f3e23778. | ||||
| * | dri: Assert pointer is not null before dereferencing. | Vinson Lee | 2010-02-27 | 1 | -0/+1 |
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| * | r600: Assert pointer is not null before dereferencing. | Vinson Lee | 2010-02-27 | 1 | -0/+3 |
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| * | r600: enable OQ on rv740 on drms with working pipe config | Alex Deucher | 2010-02-26 | 1 | -3/+6 |
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| * | r600: fail to validate unsupported texture formats | Klaus Schnass | 2010-02-26 | 1 | -16/+12 |
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| * | intel: Lookup requested renderbuffer in intel_create_image_from_renderbuffer | Kristian Høgsberg | 2010-02-26 | 1 | -1/+2 |
| | | | | | Previously we'd use the current renderbuffer. | ||||
| * | r300/compiler: Assert that array index is not negative. | Vinson Lee | 2010-02-26 | 1 | -0/+2 |
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| * | i965: Remove unnecessary headers. | Vinson Lee | 2010-02-25 | 10 | -25/+0 |
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| * | i965: Try to hook up the Sandybridge URB_WRITE SEND message. | Eric Anholt | 2010-02-25 | 1 | -7/+25 |
| | | | | | My units still hang when doing this if the VS is enabled. | ||||
| * | i965: Fix up the VUE handling for SNB, and hopefully clarify comments. | Eric Anholt | 2010-02-25 | 1 | -25/+49 |
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| * | i965: Don't set a nonexistent enable bit in several SNB state pointers. | Eric Anholt | 2010-02-25 | 3 | -5/+5 |
| | | | | | | The modify bit is now usually in the instruction header. The exception is CC state pointers. | ||||
| * | i965: Lump SNB in with Ironlake for bigger VUEs. | Eric Anholt | 2010-02-25 | 1 | -2/+2 |
| | | | | | This gets the VS to the point of accepting vertices. \o/ | ||||
| * | i965: Fix the SNB VE valid bit. | Eric Anholt | 2010-02-25 | 1 | -1/+1 |
| | | | | | So, when the docs say that 0 means enabled now? That's a lie. | ||||
| * | intel: Fix up INTEL_NO_HW support. | Eric Anholt | 2010-02-25 | 1 | -1/+2 |
| | | | | | | This was accidentally (it seems) deleted in 5203b7227ccb6b618fa42f08434d4a3cf123dca2 | ||||
| * | i965: Don't include SNB in has_negative_rhw_bug. | Eric Anholt | 2010-02-25 | 1 | -1/+1 |
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