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path: root/src/mesa/drivers/dri
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* i965/gen8: Use HALIGN_16 for single sample mcs buffersBen Widawsky2015-06-191-1/+1
* i965: Add missing braces around if-statement.Matt Turner2015-06-181-1/+2
* i965/compute: Fix undefined code with right_mask for SIMD32Jordan Justen2015-06-181-1/+1
* i965: Fix textureGrad with cube samplersIago Toral Quiroga2015-06-181-8/+18
* i965: enable ARB_framebuffer_no_attachments for Gen7+Kevin Rogovin2015-06-172-0/+7
* i965: execution of frag-shader when it has atomic bufferKevin Rogovin2015-06-172-0/+7
* i965: Use _mesa_geometric_ functions appropriatelyKevin Rogovin2015-06-1716-34/+70
* i965/gen9: Disable Mip Tail for YF/YS tiled surfacesAnuj Phogat2015-06-162-2/+11
* i965/gen9: Set vertical and horizontal surface alignmentsAnuj Phogat2015-06-161-6/+26
* i965: Use BRW_SURFACE_* in place of GL_TEXTURE_*Anuj Phogat2015-06-161-3/+3
* i965: Rename use_linear_1d_layout() and make it globalAnuj Phogat2015-06-162-5/+9
* i965/gen9: Set tiled resource mode in surface stateAnuj Phogat2015-06-162-0/+27
* i965/vec4: Fix the source register for indexed samplersNeil Roberts2015-06-161-0/+3
* i965: Fix aligning to the block size in intel_miptree_copy_sliceNeil Roberts2015-06-161-2/+4
* i965: Check for miptree pitch alignment before using intel_miptree_map_movntd...Anuj Phogat2015-06-151-1/+3
* i965: Remove break after returnAnuj Phogat2015-06-151-3/+0
* i965/gen8+: Add aux buffer alignment assertionsBen Widawsky2015-06-121-0/+22
* i965/gen9: Set HALIGN_16 for all aux buffersBen Widawsky2015-06-121-3/+19
* i965/gen8: Correct HALIGN for AUX surfacesBen Widawsky2015-06-123-7/+22
* i965: Extract tiling from fast clear decisionBen Widawsky2015-06-122-16/+30
* i965/gen9: Only allow Y-Tiled MCS buffersBen Widawsky2015-06-121-0/+2
* i965: Consolidate certain miptree params to flagsBen Widawsky2015-06-129-75/+77
* i965/nir: Support barrier intrinsic functionJordan Justen2015-06-121-0/+4
* i965/fs: Implement support for ir_barrierJordan Justen2015-06-125-0/+45
* i965: Add brw_barrier to emit a Gateway Barrier SENDJordan Justen2015-06-122-0/+32
* i965: Add brw_WAIT to emit wait instructionJordan Justen2015-06-122-0/+23
* i965: Add notification registerJordan Justen2015-06-121-0/+16
* i965: Disassemble Gateway SEND messagesJordan Justen2015-06-121-0/+16
* i965/inst: Add gateway_notify and gateway_subfuncid fieldsJordan Justen2015-06-121-3/+11
* i965: Add GATEWAY_SFID definitionsJordan Justen2015-06-121-0/+8
* glsl: Add ir node for barrierChris Forbes2015-06-122-0/+7
* i965/cs: Use exec all for CS terminateJordan Justen2015-06-121-1/+2
* i965/fs: Fix unused variable warningChad Versace2015-06-121-1/+2
* mesa: build xmlconfig to a separate static libraryErik Faye-Lund2015-06-126-4/+14
* i965/fs: Remove one more fixed brw_null_reg() from the visitor.Francisco Jerez2015-06-121-1/+1
* Revert "i965: Advertise a line width of 40.0 on Cherryview and Skylake."Kenneth Graunke2015-06-111-5/+1
* i965: Re-index SSA definitions before printing NIR code.Kenneth Graunke2015-06-111-0/+6
* i965/gen8: Fix antialiased line rendering with width < 1.5Iago Toral Quiroga2015-06-114-49/+30
* i965: do_blit_drawpixels: decode array formatsAlexander Monakov2015-06-111-0/+2
* i965: do not round line width when multisampling or antialiaing are enabledIago Toral Quiroga2015-06-115-15/+25
* i965: Momentarily pretend to support ARB_texture_stencil8 for blits.Kenneth Graunke2015-06-101-0/+7
* android: export more dirs from libmesa_dri_commonChih-Wei Huang2015-06-091-1/+3
* i965/gen9: Use raw PS invocation count for queriesBen Widawsky2015-06-091-1/+1
* fs/reg_allocate: Remove the MRF hack helpers from fs_visitorJason Ekstrand2015-06-092-16/+13
* i965/fs: Don't let the EOT send message interfere with the MRF hackJason Ekstrand2015-06-092-3/+17
* i965/fs: Drop fs_inst::force_uncompressed.Francisco Jerez2015-06-091-1/+0
* i965/fs: Remove dead IR construction code from the visitor.Francisco Jerez2015-06-094-439/+0
* i965/fs: Migrate test_fs_cmod_propagation to the IR builder.Francisco Jerez2015-06-091-52/+50
* i965/fs: Migrate test_fs_saturate_propagation to the IR builder.Francisco Jerez2015-06-091-35/+34
* i965/fs: Migrate translation of NIR texturing instructions to the IR builder.Francisco Jerez2015-06-092-5/+6
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