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* i965/simd8vs: Fix SIMD8 atomics (read-only)Jordan Justen2015-02-181-8/+16
* i915: For the love of all that is holy, stop saying "IGD"Adam Jackson2015-02-181-7/+7
* i965: implement ARB_pipeline_statistics_queryBen Widawsky2015-02-173-0/+106
* i965: Prefer Meta over the BLT for BlitFramebuffer.Kenneth Graunke2015-02-171-7/+7
* i965/fs: Add algebraic optimizations for MAD.Matt Turner2015-02-171-0/+43
* i965/fs: Emit MAD instructions when possible.Matt Turner2015-02-172-8/+8
* i965/fs: Allow immediates in MAD and LRP instructions.Matt Turner2015-02-172-3/+33
* i965/fs: Add pass to combine immediates.Matt Turner2015-02-174-0/+287
* i965/fs: Remove force_writemask_all assertion for execsize < 8.Matt Turner2015-02-171-1/+0
* i965/cfg: Add function to generate a dot file of the dominator tree.Matt Turner2015-02-172-0/+11
* i965/cfg: Add function to generate a dot file of the CFG.Matt Turner2015-02-172-0/+15
* i965/cfg: Calculate the immediate dominators.Matt Turner2015-02-172-4/+76
* i965/cfg: Allow cfg::dump to be called without a visitor.Matt Turner2015-02-171-1/+2
* i965: Allow exec_list sentinels as arguments to insert functions.Matt Turner2015-02-171-2/+4
* i965: Add device limits for tess threads & URB entriesChris Forbes2015-02-174-0/+48
* i915c: Use the actual MIN instruction.Kenneth Graunke2015-02-171-15/+1
* i965: Add a function to disassemble an instruction from the 4 dwords.Kenneth Graunke2015-02-171-0/+12
* i965: Do Sandybridge workaround flushes before each primitive.Kenneth Graunke2015-02-1711-84/+20
* i965/vec4: Silence unused parameter warningsIan Romanick2015-02-173-7/+5
* i965/simd8vs: Fix SIMD8 atomicsBen Widawsky2015-02-161-8/+16
* i965/vec4: Override destination register writemask in sampler message send.Francisco Jerez2015-02-161-0/+1
* i965: Fix a crash in the texture gradient lowering pass with cube samplersIago Toral Quiroga2015-02-161-1/+3
* i965/fs: Handle U/UW-type immediates in the generator.Matt Turner2015-02-151-0/+6
* i965/fs: Handle W/UW-type immediates in dump_instructions().Matt Turner2015-02-151-0/+2
* i965: Let dump_instructions() work before calculate_cfg().Matt Turner2015-02-152-13/+28
* i965/fs: Call calculate_cfg() before optimize().Matt Turner2015-02-151-2/+4
* i965: Optimize multiplication by -1 into a negated MOV.Matt Turner2015-02-152-0/+14
* i965: Add an is_negative_one() method.Matt Turner2015-02-152-0/+17
* i965/vec4/vp: Use vec4_visitor::CMP.Matt Turner2015-02-151-2/+1
* i965/nir: Don't support gl_FrontFacing as an input variableJason Ekstrand2015-02-141-3/+0
* i965/nir: Add support for nir_intrinsic_load_front_faceJason Ekstrand2015-02-141-1/+3
* r200: Drop unused variable.Eric Anholt2015-02-121-1/+0
* i965: Quiet another compiler warning about uninitialized values.Eric Anholt2015-02-121-2/+2
* i965: Move some asserts to unreachable.Eric Anholt2015-02-121-2/+2
* i965: Shut up a compiler warning about uninitialized var.Eric Anholt2015-02-121-1/+1
* i965/vs/skl: Use vec4 datatypes for message headerBen Widawsky2015-02-111-2/+2
* i965: Add LINTERP/CINTERP to can_do_cmod().Matt Turner2015-02-111-0/+2
* i965/fs: Remove conditional mod when optimizing a SEL into a MOV.Matt Turner2015-02-111-0/+1
* i965/vec4: Emit MADs from (x + abs(y * z)).Matt Turner2015-02-101-3/+15
* i965/vec4: Emit MADs from (x + -(y * z)).Matt Turner2015-02-101-0/+12
* i965/skl: Implement WaDisable1DDepthStencilNeil Roberts2015-02-101-0/+12
* i965/gen7-8: Implement glMemoryBarrier().Francisco Jerez2015-02-102-0/+41
* i965: Generalize the update_null_renderbuffer_surface vtbl hook to non-render...Francisco Jerez2015-02-104-56/+55
* i965: Allocate binding table space for shader images.Francisco Jerez2015-02-102-0/+12
* i965: Don't tile 1D miptrees.Francisco Jerez2015-02-101-0/+7
* i965/vec4: Don't set any dependency control bits for F32TO16 on Gen8.Francisco Jerez2015-02-101-0/+5
* i965: Handle negated unsigned immediate values in constant propagation.Francisco Jerez2015-02-103-19/+19
* i965/vec4: Take into account non-zero reg_offset during register allocation.Francisco Jerez2015-02-101-1/+3
* i965/vec4: Add register classes up to MAX_VGRF_SIZE.Francisco Jerez2015-02-103-7/+9
* i965/vec4: Init mlen for several send from GRF instructions.Francisco Jerez2015-02-103-5/+11
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