summaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers/dri
Commit message (Expand)AuthorAgeFilesLines
* r300g: Fix non-dri buildsTom Stellard2011-05-282-1/+7
* i965/fs: Fix up for 8752764076e5b3f052a57e0134424a37bf2e9164.Eric Anholt2011-05-272-4/+4
* i965/fs: Do a FS compile up front at link time to produce link errors.Eric Anholt2011-05-275-27/+142
* i965/fs: Split the GLSL IR -> FS LIR visitor to brw_fs_visitor.cpp.Eric Anholt2011-05-274-1679/+1736
* i965/fs: Split the BRW native code emit to brw_fs_emit.cppEric Anholt2011-05-273-839/+876
* i965: Move a couple of GLSL IR -> BRW helper functions to brw_shader.cpp.Eric Anholt2011-05-273-49/+76
* i965: Move non-FS-specific shader support to brw_shader.cpp.Eric Anholt2011-05-273-100/+129
* i965: Avoid generating MOVs for assignments of expressions.Eric Anholt2011-05-272-12/+75
* i965/fs: Move the computation of register block count from unit to compile.Eric Anholt2011-05-274-7/+18
* i965/fs: Track fixed GRF regs separate from allocated GRF file in scheduling.Eric Anholt2011-05-272-1/+22
* i965/fs: Add a helper function for add_dep(before, after, before->latency).Eric Anholt2011-05-271-31/+19
* i965: Pack the lookup and line_aa bits into the first dword of the key.Eric Anholt2011-05-261-2/+2
* i965: Remove dead shadowtex_mask entry in the WM key.Eric Anholt2011-05-262-4/+0
* i965: Remove linear_color for GL_PERSPECTIVE_CORRECTION_HINT.Eric Anholt2011-05-267-30/+10
* intel: Drop doubly irrelevant code in intelReadBuffers.Eric Anholt2011-05-261-12/+0
* i965: Warnings cleanup.Eric Anholt2011-05-252-4/+0
* i965: Fix assertion failures in unused brw_reg setup by deleting it.Eric Anholt2011-05-251-1/+0
* intel: Change FBO validation criteria to accomodate hiz and seprate stencilChad Versace2011-05-251-15/+27
* intel: Fix intel_draw_buffer() to accomodate hiz and separate stencilChad Versace2011-05-251-5/+11
* intel: Add hiz_region to intel_mipmap_treeChad Versace2011-05-253-0/+36
* intel: Refactor the wrapping of textures with renderbuffersChad Versace2011-05-251-7/+8
* intel: Add hiz_region to intel_renderbufferChad Versace2011-05-252-0/+46
* intel: Add is_hiz_depth_format() to intel_contex.vtblChad Versace2011-05-253-0/+24
* intel: Allocate region for separate stencil bufferChad Versace2011-05-251-3/+30
* intel: Change supported texture formats for separate stencilChad Versace2011-05-252-1/+7
* intel: Add flags to intel_context for hiz and separate stencilChad Versace2011-05-252-0/+58
* i965/gen7: Fix miptree layout for cube surfaces.Kenneth Graunke2011-05-221-1/+1
* i965: Remove comments about pre-965 hardware.Kenneth Graunke2011-05-221-3/+0
* i965: Fix sampling on Ivybridge after headerless change.Kenneth Graunke2011-05-201-2/+13
* i965: Remove "TXD" from justification of sampler message headers.Kenneth Graunke2011-05-201-1/+1
* i965/gen7: Add support for rendering to depthbuffer mipmap levels > 0.Kenneth Graunke2011-05-202-31/+18
* r300: move declaration before codeBrian Paul2011-05-191-1/+1
* i965: Add support for rendering to depthbuffer mipmap levels > 0.Eric Anholt2011-05-184-32/+58
* i965: Stop caching the combined depth/stencil region in brw_context.c.Eric Anholt2011-05-187-55/+53
* i965/gen6: Add support for point min/max size from ARB_point_parameters.Eric Anholt2011-05-181-2/+7
* i965/fs: Don't emit a header on gen5+ sample messages unless required.Eric Anholt2011-05-181-7/+19
* i965/fs: Fix GPU hang on texture2d-bias on pre-Ironlake.Eric Anholt2011-05-181-4/+7
* i965: Add support for correct GL_CLAMP behavior by clamping coordinates.Eric Anholt2011-05-189-69/+90
* i965/fs: Drop the viewport index/rtai clearing in gen6 fb writes.Eric Anholt2011-05-181-6/+0
* i965/fs: Add support for "if" statements in 16-wide mode on gen6+.Eric Anholt2011-05-182-3/+7
* i965/fs: Fix discard and alpha test in 16-wide.Eric Anholt2011-05-181-6/+8
* i965/gen6: Fix blending state when no color buffer is bound.Eric Anholt2011-05-181-2/+12
* i965/fs: Cut an instruction and a temporary from gen6 discard statements.Eric Anholt2011-05-182-40/+30
* i965/fs: Fix compiler warnings about dead code from 963431829055f63ec94dEric Anholt2011-05-181-19/+0
* i965: Rename IS_GT1 and IS_GT2 to IS_SNB_GT1 and IS_SNB_GT2.Kenneth Graunke2011-05-182-4/+4
* i965: Instead of fallback on missing region, just bind a null renderbuffer.Eric Anholt2011-05-172-12/+4
* i965: Updated fixed-point sizes in Ivybridge SAMPLER_STATE.Kenneth Graunke2011-05-171-3/+3
* i965: Ivybridge uses the Gen4 SAMPLER_BORDER_COLOR_STATE.Kenneth Graunke2011-05-171-1/+4
* intel: Recognize new Ivybridge PCI IDs.Kenneth Graunke2011-05-172-2/+22
* i965: Disable register spilling on Ivybridge for now.Kenneth Graunke2011-05-171-0/+2