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path: root/src/mesa/drivers/dri
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* mesa: enable ARB_texture_buffer_* extensions in the Compatibility profileMarek Olšák2017-11-091-3/+5
* i965: Pretend there are 4 subslices for compute shader threads on Gen9+.Kenneth Graunke2017-11-091-1/+13
* i965: expose SRGB visuals and turn on EGL_KHR_gl_colorspaceTapani Pälli2017-11-093-7/+26
* i965: properly initialize brw->cs.base.stage to MESA_SHADER_COMPUTEKenneth Graunke2017-11-081-0/+1
* intel/nir: Break the linking code into a helper in brw_nir.cJason Ekstrand2017-11-081-34/+4
* intel/cs: Push subgroup ID instead of base thread IDJason Ekstrand2017-11-071-3/+3
* i965: disable NIR linking on HSW and belowTimothy Arceri2017-11-071-1/+4
* i965: Enable flush controlNeil Roberts2017-11-062-1/+21
* dri: Add a flush control extensionNeil Roberts2017-11-062-2/+21
* dri: Change __DriverApiRec::CreateContext to take a struct for attribsNeil Roberts2017-11-0612-103/+128
* intel: Don't flush the old context in intelMakeCurrentNeil Roberts2017-11-062-18/+0
* i965/gen10: Implement Wa3DStateModeAnuj Phogat2017-11-032-0/+16
* i965/gen10: Enable float blend optimizationAnuj Phogat2017-11-032-0/+9
* i965/gen10: Implement WaForceRCPFEHangWorkaroundAnuj Phogat2017-11-031-0/+23
* i965/gen10: Implement WaSampleOffsetIZ workaroundAnuj Phogat2017-11-032-0/+50
* i965/gen10: Don't set Antialiasing Enable in 3DSTATE_RASTER if num_samples > 1Anuj Phogat2017-11-031-0/+10
* i965/gen10: Don't set Smooth Point Enable in 3DSTATE_SF if num_samples > 1Anuj Phogat2017-11-031-1/+12
* i965: perf: list registers to program for queriesLionel Landwerlin2017-11-032-0/+66
* i965: perf: factorize code for availabilityLionel Landwerlin2017-11-031-12/+16
* i965: perf: make revision variable availableLionel Landwerlin2017-11-035-8/+10
* i965: Initialize disk shader cache if MESA_GLSL_CACHE_DISABLE is falseJordan Justen2017-10-313-0/+31
* dri drivers: Always add the sha1 build-idJordan Justen2017-10-314-1/+4
* i965: Initialize sha1 hash of dri config optionsJordan Justen2017-10-311-0/+4
* i965: Don't link when the program was found in the disk cacheJordan Justen2017-10-311-0/+3
* i965: add cache fallback support using serialized nirJordan Justen2017-10-311-1/+26
* i965: add support for cached shaders with xfb qualifiersTimothy Arceri2017-10-311-0/+8
* i965: Add shader cache support for computeJordan Justen2017-10-315-12/+53
* i965: add shader cache support for tess stagesTimothy Arceri2017-10-313-16/+70
* i965: add shader cache support for geometry shadersTimothy Arceri2017-10-312-8/+35
* i965: Add shader cache support for vertex and fragment stagesTimothy Arceri2017-10-313-16/+30
* i965: add initial implementation of on disk shader cacheTimothy Arceri2017-10-314-0/+297
* i965: Calculate thread_count in brw_alloc_stage_scratchJordan Justen2017-10-318-45/+62
* intel/compiler: Remove final_program_size from brw_compile_*Jordan Justen2017-10-316-21/+15
* i965: Don't rely on nir for uses_texture_gatherJordan Justen2017-10-313-9/+9
* i965/link: Serialize program to nir after linking for shader cacheJordan Justen2017-10-311-0/+10
* i965: Check CCS_E compatibility for texture view renderingNanley Chery2017-10-311-2/+27
* i965: Fix ARB_indirect_parameters logic.Plamena Manolova2017-10-301-31/+16
* i965: Don't flag BRW_NEW_SURFACES unless some push constants are dirty.Kenneth Graunke2017-10-301-2/+1
* i965: correctly assign SamplerCount of INTERFACE_DESCRIPTOR_DATAKevin Rogovin2017-10-291-1/+1
* i965: Only set key->high_quality_derivatives when it matters.Kenneth Graunke2017-10-291-0/+1
* i965: Update brw_wm_debug_recompile() for newer key entries.Kenneth Graunke2017-10-291-5/+14
* i965: unref push_const_bo in intelDestroyContextTapani Pälli2017-10-271-0/+6
* i965: remove if conditions from scratch_bo unrefTapani Pälli2017-10-271-10/+6
* i965/miptree: Take an isl_format in render_aux_usageJason Ekstrand2017-10-265-27/+39
* i965/blorp: Use more temporary isl_format variablesJason Ekstrand2017-10-261-8/+7
* i965/blorp: Use blorp_to_isl_format for src_isl_format in blit_miptreesJason Ekstrand2017-10-261-1/+2
* meson: build nouveau vieux driverDylan Baker2017-10-262-0/+95
* meson: build r200 driverDylan Baker2017-10-262-0/+94
* meson: build r100 driverDylan Baker2017-10-262-0/+90
* intel/compiler: Call nir_lower_system_values in brw_preprocess_nirJason Ekstrand2017-10-251-2/+0
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