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Commit message (
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Author
Age
Files
Lines
*
intel: Mark the FBO as incomplete if there's no intel_renderbuffer for it.
Eric Anholt
2009-09-21
1
-0
/
+5
*
intel: Fix crash in intel_flush().
Michel Dänzer
2009-09-21
1
-1
/
+2
*
intel: Deassociated drawables from private context struct in intelUnbindContext
Ian Romanick
2009-09-16
1
-0
/
+8
*
intel: add B43 chipset support
Zhenyu Wang
2009-09-10
2
-1
/
+6
*
i965: fix incorrect test for vertex position attribute
Brian Paul
2009-09-08
3
-1
/
+4
*
i965: Fix warnings in intel_pixel_read.c.
Eric Anholt
2009-09-04
1
-0
/
+4
*
intel: Also get the DRI2 front buffer when doing front buffer reading.
Eric Anholt
2009-09-04
4
-1
/
+29
*
intel: Update Mesa state before span setup in glReadPixels.
Eric Anholt
2009-09-04
3
-3
/
+13
*
intel: Move intel_pixel_read.c to shared for use with i965.
Eric Anholt
2009-09-04
2
-306
/
+307
*
i965: Add missing state dependency of sf_unit on _NEW_BUFFERS.
Eric Anholt
2009-09-04
1
-2
/
+4
*
intel: Align cubemap texture height to its padding requirements.
Eric Anholt
2009-09-04
1
-0
/
+10
*
intel: Align untiled region height to 2 according to 965 docs.
Eric Anholt
2009-09-04
1
-0
/
+7
*
i965: Fix source depth reg setting for FSes reading and writing to depth.
Eric Anholt
2009-09-04
3
-1
/
+5
*
i965: Respect CondSwizzle in OPCODE_IF.
Eric Anholt
2009-09-04
1
-1
/
+21
*
i965: asst clean-ups, etc in brw_vs_emit()
Brian Paul
2009-09-04
1
-11
/
+10
*
i965: Emit conditional code updates as required for GLSL VS if statements.
Eric Anholt
2009-09-04
1
-0
/
+13
*
i965: Spell "conditional" correctly.
Eric Anholt
2009-09-04
3
-15
/
+15
*
i965: Fix RECT shadow sampling by not losing the other texcoords.
Eric Anholt
2009-09-04
1
-1
/
+5
*
i965: Assert that the offset in the VBO is below the VBO size.
Eric Anholt
2009-09-04
1
-0
/
+14
*
i965: Even if no VS inputs are set, still load some amount of URB as required.
Eric Anholt
2009-09-04
1
-0
/
+11
*
i965: Make sure the VS URB size is big enough to fit a VF VUE.
Eric Anholt
2009-09-04
1
-1
/
+8
*
i965: Don't emit bad packets when no VBs are referenced.
Eric Anholt
2009-09-04
1
-0
/
+22
*
i965: Calculate enabled[] and nr_enabled once and re-use the values.
Eric Anholt
2009-09-04
2
-29
/
+18
*
i965: Set the max index buffer address correctly according to the docs.
Eric Anholt
2009-09-04
1
-1
/
+1
*
i965: rename var: s/tmp/vs_inputs/
Brian Paul
2009-09-04
1
-8
/
+8
*
dri: Fix problems with unitialized values in dri screen object.
Pauli Nieminen
2009-08-07
1
-1
/
+1
*
intel: Fix inverted test for disabling flushing of front buffer output.
Brian Paul
2009-08-04
1
-1
/
+1
*
intel: Wait on the last swapbuffers to complete before queuing a new one.
Brian Paul
2009-08-04
3
-0
/
+28
*
intel: Fix leak of DRI option info due to using the wrong free routine.
Brian Paul
2009-07-27
1
-1
/
+1
*
intel: Clean up leak of driver context structure on context destroy.
Brian Paul
2009-07-27
1
-0
/
+3
*
intel: Use _mesa_warning() to report GEM warnings
Brian Paul
2009-07-27
1
-3
/
+3
*
intel: Fall back on glBitmap with fog enabled.
Eric Anholt
2009-07-20
1
-0
/
+6
*
i965: Don't clip everything if FRONT_AND_BACK culling while culling disabled.
Eric Anholt
2009-07-20
1
-1
/
+2
*
radeon: With DRI1, if we have HW stencil, only expose fbconfigs with stencil.
Michel Dänzer
2009-07-20
1
-2
/
+2
*
r128: fix two-sided lighting segfault seen in GLUT's olight demo
Peteri Andras
2009-07-13
3
-2
/
+7
*
intel: Bump driver data, add RC3 tag
intel_2009q2_rc3
Ian Romanick
2009-07-12
1
-1
/
+1
*
i965: fix fetching constants from constant buffer in glsl path
Roland Scheidegger
2009-07-04
4
-17
/
+16
*
i965: Remove bad constant buffer constant-reg-already-loaded optimization.
Eric Anholt
2009-07-04
1
-13
/
+11
*
intel: Also update stencil bits in intel_update_wrapper().
Michel Dänzer
2009-07-03
1
-0
/
+1
*
i915: Fix assertion failure on remapping a non-BO-backed VBO.
Eric Anholt
2009-06-30
1
-1
/
+4
*
intel: added null ptr check
Brian Paul
2009-06-29
1
-1
/
+1
*
intel / DRI2: Additional flush of fake front-buffer to real front-buffer
Ian Romanick
2009-06-26
1
-0
/
+11
*
i965: handle OPCODE_SWZ in the glsl path
Roland Scheidegger
2009-06-22
1
-0
/
+1
*
intel: intel_texture_drawpixels() can't handle GL_DEPTH_STENCIL.
Michel Dänzer
2009-06-22
1
-1
/
+1
*
i965: added intelFlush() call in intel_get_tex_image()
Brian Paul
2009-06-22
1
-0
/
+6
*
intel: Fix other metaops versus GL_COMPILE_AND_EXECUTE dlists.
Eric Anholt
2009-06-19
2
-3
/
+3
*
intel: Fix glClear behavior versus display lists.
Eric Anholt
2009-06-19
1
-1
/
+1
*
radeons: use dp4 for position invariant vertex programs
Roland Scheidegger
2009-06-19
3
-0
/
+6
*
intel: remove extra \n from warning string
Brian Paul
2009-06-17
1
-1
/
+1
*
i965: fix 1D texture borders with GL_CLAMP_TO_BORDER
Robert Ellison
2009-06-17
1
-0
/
+10
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