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* intel: GetBuffer fixBen Widawsky2011-08-101-1/+6
* i830: Add missing vtable entry for i830 from the hiz work.Carl Simonson2011-08-101-0/+7
* i965: Drop the reg/hw_reg distinction.Eric Anholt2011-08-105-36/+37
* i965/fs: Factor out the register allocator setup to a separate function.Eric Anholt2011-08-102-66/+105
* i965/fs: Simplify the register allocator using a map from RA reg to GRF.Eric Anholt2011-08-101-41/+38
* i965/fs: Eliminate the magic nature of virtual GRF 0.Eric Anholt2011-08-104-31/+17
* i965/fs: Use the new convenience interface for setting up reg conflicts.Eric Anholt2011-08-101-22/+7
* intel: Fix warnings from gl_constant_parameter changes.Eric Anholt2011-08-053-11/+9
* i965: Add dumping for gen6 WM constants too.Eric Anholt2011-08-053-1/+22
* i965/fs: Don't upload unused uniform components.Eric Anholt2011-08-052-4/+95
* i965/fs: Don't allocate the old backend's compile structs for our compile.Eric Anholt2011-08-051-4/+7
* Merge branch 'glsl-to-tgsi'Bryan Cain2011-08-047-30/+30
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| * r200, r600c, i965: fix buildBryan Cain2011-08-017-30/+30
* | radeon: Remove some remaining set-but-unused variables.Eric Anholt2011-08-024-14/+0
* | radeon: Remove set-but-unused variables in radeon_lock.cEric Anholt2011-08-021-10/+0
* | radeon: Remove set-but-unused variables in radeonSetTexBuffer2() variants.Eric Anholt2011-08-025-29/+0
* | radeon: Remove set-but-unused log2depth variable.Eric Anholt2011-08-021-2/+1
* | radeon: Remove set-but-unused color_mask variable.Eric Anholt2011-08-022-6/+0
* | intel: Fix unused variable warning.Eric Anholt2011-08-021-1/+0
* | i915: Only emit program errors when INTEL_DEBUG=wm or INTEL_DEBUG=fallbacksIan Romanick2011-08-021-6/+8
* | i915: Fail without crashing if a Mesa IR program uses too many registersIan Romanick2011-08-021-2/+13
* | i965/gen5+: Fix incorrect miptree layout for non-power-of-two cubemaps.Kenneth Graunke2011-08-011-1/+1
* | i965/fs: Allow register coalescing where the source is a uniform.Eric Anholt2011-07-291-10/+14
* | i965/fs: Optimize a * 1.0 -> a.Eric Anholt2011-07-292-0/+44
* | i965/fs: If we see a RCP of a constant, try to constant fold it.Eric Anholt2011-07-291-0/+14
* | i965/fs: Port texture projection avoidance optimization from the old backend.Eric Anholt2011-07-291-3/+15
* | Revert "i965: Don't compute brw->wm.input_size_masks when it's unused."Eric Anholt2011-07-291-11/+1
* | i965/fs: Stop using the exec_list iterator.Eric Anholt2011-07-296-71/+67
* | i965/fs: Respect ARB_color_buffer_float clamping.Eric Anholt2011-07-281-6/+15
* | i965: Remove the now unused intel_renderbuffer::draw_offset field.Kenneth Graunke2011-07-282-2/+0
* | i965: Check actual tile offsets in Gen4 miptree workaround.Kenneth Graunke2011-07-281-2/+17
* | i965/gen4: Fix message parameter loading for 1D TXD sampling.Kenneth Graunke2011-07-281-2/+4
* | i965/fs: Fix MRT drawing since the m0->m2 move for shader debug.Eric Anholt2011-07-251-1/+2
* | r300/compiler: simplify code in peephole_add_presub_addTobias Droste2011-07-251-17/+18
* | i965: Fix many of the trivial WebGL demos that broke due to IB optimization.Eric Anholt2011-07-251-0/+1
* | i965: Use 3D clears on gen6+ to avoid inter-ring synchronization.Eric Anholt2011-07-251-2/+2
* | i965: Emit texture cache flushes on gen6 along with render cache flushes.Eric Anholt2011-07-251-0/+1
* | i965: vs optimization fix: Check val.{negate,abs} in accumulator_contains()Paul Berry2011-07-251-0/+3
* | i965/gen7: Fix shadow sampling in the old brw_wm_emit backend.Kenneth Graunke2011-07-251-4/+11
* | i965/fs: Clear result before visiting shadow comparitor and LOD info.Kenneth Graunke2011-07-251-0/+10
* | i965: When emitting a src/dst read of an output, keep the swizzle and negIan Romanick2011-07-231-3/+16
* | i965: When emitting a src/dst write of an output, keep the write maskIan Romanick2011-07-231-1/+5
* | Merge branch 'remove-copyteximage-hook'Brian Paul2011-07-218-162/+0
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| * | radeon: remove radeonCopyTexImage2D()Brian Paul2011-07-197-65/+0
| * | intel: remove intelCopyTexImage1D/2D()Brian Paul2011-07-191-97/+0
* | | i965: Apply a homebrew workaround for GPU hang in OGLC api-texcoord.Eric Anholt2011-07-201-0/+26
* | | i965: Enable the PIPE_CONTROL workaround workaround out of paranoia.Eric Anholt2011-07-202-3/+29
* | | i965: Avoid kernel BUG_ON if we happen to wait on the pipe_control w/a BO.Eric Anholt2011-07-201-1/+1
* | | intel: Use the GLSL-based meta clear when available.Eric Anholt2011-07-201-1/+4
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* | intel: Fix stencil buffer to be W tiledChad Versace2011-07-195-31/+93