summaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers/dri
Commit message (Expand)AuthorAgeFilesLines
* tree-wide: remove trailing backslashEric Engestrom2017-06-071-1/+1
* i965: Explicitly disallow tiled memcpy path on Gen4 with swizzling.Chris Wilson2017-06-063-0/+33
* i965: Remove brw_bo_map_unsynchronized()Matt Turner2017-06-063-23/+2
* i965: Use unsynchronized mappings for BufferSubData on non-LLCMatt Turner2017-06-061-10/+6
* i965: Make unsynchronized maps unsynchronized on non-LLCMatt Turner2017-06-062-22/+3
* i965: Implement brw_bo_map_unsynchronized() with MAP_ASYNCMatt Turner2017-06-061-40/+9
* i965: Elide call to set_domain() if MAP_ASYNCMatt Turner2017-06-061-4/+8
* i965: Add and use brw_bo_map()Matt Turner2017-06-0616-54/+52
* i965: Drop MAP_READ from some write-only mappingsMatt Turner2017-06-064-4/+4
* i965: Pass flags to brw_bo_map_*Matt Turner2017-06-0616-33/+49
* i965: Rename brw_bo_map() -> brw_bo_map_cpu()Matt Turner2017-06-0616-29/+30
* i965: Rename *_virtual -> map_*Matt Turner2017-06-062-31/+31
* i965: Pass the map-mode along to intel_mipmap_tree_map_raw()Chris Wilson2017-06-061-13/+16
* i965: Add a cache_coherent field to brw_boMatt Turner2017-06-063-0/+9
* i965: Remove unused 'use_resource_streamer' fieldMatt Turner2017-06-061-1/+0
* i965: Remove brw_bo's virtual memberMatt Turner2017-06-0617-121/+102
* i965: Remove unused brw_bo_map__* functionsMatt Turner2017-06-062-109/+0
* i965: Finalize miptrees before prepare_textureJason Ekstrand2017-06-051-0/+4
* i965: Order write of query availablity with earlier writesChris Wilson2017-06-031-2/+11
* i965: Replace 0 with ISL_FORMAT_UNSUPPORTED in format table (v2)Chad Versace2017-06-022-92/+6
* intel/blorp: Handle gen6 stencil/HiZ offsets in the back-endJason Ekstrand2017-06-014-72/+11
* intel/isl: Make get_intratile_offset_el take the element size in bitsJason Ekstrand2017-06-011-1/+1
* intel/isl: Remove the device parameter from isl_tiling_get_infoJason Ekstrand2017-06-011-2/+1
* i965: Rework Sandy Bridge HiZ and stencil layoutsJason Ekstrand2017-06-015-29/+134
* i965/dri: Fix bad GL error in intel_create_winsys_renderbuffer()Chad Versace2017-06-011-5/+1
* i965: Cleanup in intel_create_winsys_renderbuffer()Chad Versace2017-06-011-5/+2
* i965: Remove bad assert on isl_formatChad Versace2017-06-011-1/+0
* i965: Fix return type of translate_tex_format()Chad Versace2017-06-013-6/+6
* i965: Fix return type of brw_isl_format_for_mesa_format() [v2]Chad Versace2017-06-013-8/+10
* i965: Remove an extra semicolonAnuj Phogat2017-06-011-1/+1
* i965: Rename brw_format variable names to isl_formatAnuj Phogat2017-06-013-7/+9
* i965: Reject unsupported formats in glEGLImageTargetTexture2D()Chad Versace2017-06-011-0/+4
* genxml: Make 3DSTATE_CONSTANT_BODY on Gen7+ use arrays.Kenneth Graunke2017-06-011-6/+4
* i965: Simplify SO_DECL handling.Kenneth Graunke2017-06-011-28/+13
* i965: Make a local for linked_xfb->Outputs[i], to shorten things.Kenneth Graunke2017-06-011-9/+10
* i965: Move SOL PSIZ hacks from draw time to link time.Kenneth Graunke2017-06-012-22/+40
* r100: Silence numerous unused this or that warningsIan Romanick2017-05-311-8/+9
* r100: Use _mesa_get_format_base_format in radeon_update_wrapperIan Romanick2017-05-311-1/+1
* r100,r200: Don't assume glVisual is non-NULL during context creationIan Romanick2017-05-313-3/+1
* r100: Don't assume that the base mipmap of a texture existsIan Romanick2017-05-311-4/+10
* i965: Delete dead old-school packing structs.Kenneth Graunke2017-05-301-175/+0
* i965: Set the "Float Blend Optimization Enable" bit on Gen9+.Kenneth Graunke2017-05-302-1/+4
* i965: Fix type of brw_context::render_target_format[]Chad Versace2017-05-303-5/+5
* i965: Move func to right comment block in brw_context.hChad Versace2017-05-301-1/+1
* i965: Document type of GLuint __DRIimage::formatChad Versace2017-05-301-1/+1
* i965: Add whitespace in intel_update_image_buffers()Chad Versace2017-05-301-0/+1
* i965: Move an 'i' declaration into its 'for' loopChad Versace2017-05-301-2/+2
* i965: Fix type of intel_update_image_buffers::formatChad Versace2017-05-301-1/+1
* i965: Rename intel_create_renderbufferChad Versace2017-05-303-8/+9
* i965/dri: Combine declaration and assignment in intelCreateBufferChad Versace2017-05-301-2/+1
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-25 16:07:07 +0000