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path: root/src/mesa/drivers/dri/r200
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* radeon: Add DRI2 flush extension support, so we synchronize properly.Mario Kleiner2010-08-022-0/+4
* Revert "radeon: Add DRI2 flush extension to so we synchronize properly."Jerome Glisse2010-08-022-4/+0
* radeon: Add DRI2 flush extension to so we synchronize properly.Mario Kleiner2010-08-022-0/+4
* glx: Drop support for GLX_MESA_allocate_memoryKristian Høgsberg2010-07-192-112/+0
* mesa: rename src/mesa/shader/ to src/mesa/program/Brian Paul2010-06-102-6/+6
* mesa: move atifragshader.[ch] to main/Brian Paul2010-06-101-1/+1
* dri: Add DRI entrypoints to create a context for a given APIKristian Høgsberg2010-04-282-2/+4
* r100/r200/r300/r600: enable accel for Copy/DrawPixels without kmsAlex Deucher2010-03-241-4/+3
* Merge branch '7.8'Brian Paul2010-03-222-24/+35
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| * r200: Fix emit size prediction to account elt splitting.Pauli Nieminen2010-03-212-3/+4
| * r200: Don't flush when closing elts in KMS.Pauli Nieminen2010-03-211-1/+2
| * r200: Fix swtnl fallback to flush pending rendering before transition.Pauli Nieminen2010-03-211-4/+14
| * r200: Fix mixed indetion in r200TclFallback.Pauli Nieminen2010-03-211-21/+20
* | Merge branch '7.8'Michel Dänzer2010-03-121-1/+1
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| * Grammar and spelling fixesJeff Smith2010-03-121-1/+1
| * radeon/r200/r600: allow src and dst BOs to be placed in GTT during blitAlex Deucher2010-03-081-8/+2
| * radeon/r200/r600: reset bos when validating buffers during blitAlex Deucher2010-03-081-0/+3
* | r100/r200/r300/r300: only enable accelerated pixel ops with kmsAlex Deucher2010-03-123-6/+9
* | r200: support additional blit formatsAlex Deucher2010-03-112-18/+138
* | r200: add additional blit formatsAlex Deucher2010-03-101-0/+17
* | radeon/r200/r600: enable HW accelerated gl(Read/Copy/Draw)PixelsAlex Deucher2010-03-105-536/+4
* | radeon/r200/r300/r600: add is_format_renderable functionMaciej Cencora2010-03-091-0/+1
* | radeon: add hw accelerated glReadPixel support (not enabled yet)Maciej Cencora2010-03-092-0/+2
* | radeon/r200/r600: allow src and dst BOs to be placed in GTT during blitAlex Deucher2010-03-081-8/+2
* | radeon/r200/r600: reset bos when validating buffers during blitAlex Deucher2010-03-081-0/+3
* | radeon: move glGetTexImage handlers to seperate fileMaciej Cencora2010-03-072-0/+2
* | radeon: added tiling functionsMaciej Cencora2010-03-073-1/+4
* | dri: drop MINIGLX_SOURCES (2)George Sapountzis2010-03-061-1/+0
* | dri: drop MINIGLX_SOURCESGeorge Sapountzis2010-03-061-2/+0
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* radeon/r200/r300/r600: add check_blit vtbl functionAlex Deucher2010-03-033-2/+5
* Remove stray defines of HAVE_RGBAIan Romanick2010-03-031-1/+0
* mesa: Remove ClearIndex and IndexMask from device-driver interfaceIan Romanick2010-03-031-2/+0
* radeon/r200/r300/r600: fix blit BO buffer validationDave Airlie2010-03-031-4/+8
* radeon/r200: fix the state emission before kernel clearDave Airlie2010-02-241-0/+2
* radeon: Define EXT_framebuffer_object constants to match hw.Pauli Nieminen2010-02-101-0/+2
* dri_interface: Introduce DRI tokens for the texBuffer texture formatsKristian Høgsberg2010-02-091-4/+4
* r200: Fix UMS notto emit stp.Pauli Nieminen2010-02-091-1/+4
* r200: Fix LOD min/max emit.Pauli Nieminen2010-02-072-7/+30
* r100/r200/r300/r600: Set MaxCombinedTextureImageunits.Pauli Nieminen2010-02-071-0/+2
* r200: Fix lod bias correction.Pauli Nieminen2010-02-073-4/+7
* r200: Add some debug output to texture function.Pauli Nieminen2010-02-061-15/+30
* r200: Optimize polygon stipple emit.Pauli Nieminen2010-02-051-1/+10
* r200: Add trace logging to r200PointSize.Pauli Nieminen2010-02-051-0/+7
* mesa: change ctx->Driver.ProgramStringNotify() to return GLbooleanBrian Paul2010-02-041-2/+5
* r200: Add the polygon stipple state to the state list.Pauli Nieminen2010-02-041-0/+1
* r200: Add logging for glPolygonStripple.Pauli Nieminen2010-02-041-0/+6
* r200: Fix EXT_fogcoord rendering.Pauli Nieminen2010-02-021-2/+2
* r200: Remove unnecessary headers.Vinson Lee2010-01-309-24/+0
* Merge branch 'mesa_7_7_branch'Brian Paul2010-01-251-1/+1
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| * r200: Silence fprintf format warning.Vinson Lee2010-01-241-1/+1
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