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path: root/src/mesa/drivers/dri/intel
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* intel: Advertise multisample DRI2 configs on gen >= 6Chad Versace2012-08-071-3/+51
* intel: Clarify intel_screen_make_configsChad Versace2012-08-071-20/+16
* dri: Simplify use of driConcatConfigsChad Versace2012-08-071-8/+2
* intel: Refactor creation of DRI2 configsChad Versace2012-08-071-91/+98
* intel: Downsample on DRI2 flushChad Versace2012-08-071-0/+31
* intel: Support mapping multisample miptreesChad Versace2012-08-072-6/+126
* intel: Refactor use of intel_miptree_mapChad Versace2012-08-071-15/+50
* intel: Refactor intel_miptree_map/unmapChad Versace2012-08-071-17/+50
* i965: Mark needed downsamples for msaa winsys buffersChad Versace2012-08-072-0/+13
* intel: Define functions for up/downsampling on miptreesChad Versace2012-08-071-2/+72
* intel: Allocate miptree for multisample DRI2 buffersChad Versace2012-08-073-8/+162
* intel: Refactor creation of hiz and mcs miptreesChad Versace2012-08-072-16/+19
* intel: Set num samples for winsys renderbuffersChad Versace2012-08-073-11/+21
* intel: Refactor quantize_num_samplesChad Versace2012-08-072-3/+7
* intel: Update stale comment for intel_miptree_slice::mapChad Versace2012-08-071-2/+2
* i965: add more Haswell PCI IDsPaulo Zanoni2012-08-072-4/+98
* mesa: Make ARB_sampler_objects mandatoryPauli Nieminen2012-08-011-1/+0
* i965/msaa: Allow GL_SAMPLES to be set to 1 prior to Gen6.Paul Berry2012-08-011-1/+9
* i965/msaa: Treat GL_SAMPLES=1 as equivalent to GL_SAMPLES=0.Paul Berry2012-08-011-3/+3
* intel: Use consistent pattern in intelCreateBufferChad Versace2012-08-011-4/+2
* intel: Decrease nesting level in intelCreateBufferChad Versace2012-08-011-66/+63
* intel: Remove dead code in intelAllocateBufferChad Versace2012-08-011-85/+7
* intel: add support for using API_OPENGL_COREJordan Justen2012-07-301-1/+1
* i965/msaa: Use MESA_FORMAT_R8 for MCS buffer.Paul Berry2012-07-271-1/+1
* intel: Make more consistent use of _mesa_is_{user,winsys}_fbo()Paul Berry2012-07-266-8/+12
* i965/msaa: Switch on 8x MSAA for Gen7.Paul Berry2012-07-241-2/+4
* i965/msaa: Adjust MCS buffer allocation for 8x MSAA.Paul Berry2012-07-241-2/+25
* intel: move error on create context to proper pathJordan Justen2012-07-241-1/+1
* mesa: move some format helper functions to glformats.cBrian Paul2012-07-241-1/+1
* i965: Add a driconf option to disable GL_ARB_blend_func_extended.Kenneth Graunke2012-07-192-2/+3
* intel: Add a comment explaining why we early return on matching BO names.Eric Anholt2012-07-171-0/+4
* intel: Drop other checks for old loader version.Eric Anholt2012-07-171-38/+26
* intel: Replace the non-getBuffersWithFormat compat path with an error message.Eric Anholt2012-07-172-21/+8
* intel: Remove dead intel_framebuffer_has_hiz().Eric Anholt2012-07-172-13/+0
* intel: Convert to using private depth/stencil buffers (v2)Eric Anholt2012-07-173-652/+39
* intel: Add a function for creating a private window system buffer.Eric Anholt2012-07-172-2/+20
* intel: Fix build broken by ETC1 patchChad Versace2012-07-161-0/+12
* intel: Enable GL_OES_compressed_ETC1_RGB8_textureChad Versace2012-07-163-1/+73
* gbm: Add new gbm_bo_import entry pointKristian Høgsberg2012-07-161-1/+7
* intel: Don't call _mesa_get_format_bytes for MESA_FORMAT_NONEKristian Høgsberg2012-07-161-1/+4
* i965: Use the blitter in intel_bufferobj_subdata for busy BOs on Gen6+.Kenneth Graunke2012-07-121-16/+10
* i965/msaa: Enable CMS layout on Gen7 for the formats that support it.Paul Berry2012-07-111-1/+18
* i965/msaa: Allocate MCS buffer when CMS MSAA is in use.Paul Berry2012-07-113-0/+69
* i965/msaa: Add an enum to describe MSAA layout.Paul Berry2012-07-114-42/+78
* intel: Implement __DRIimage::createSubImage and bump supported version to 5Kristian Høgsberg2012-07-113-3/+50
* intel: Add offset field to miptreeKristian Høgsberg2012-07-113-3/+11
* intel: Add support for new __DRIimage formatsKristian Høgsberg2012-07-111-0/+15
* i965: Revert the VBOs-in-system-memory hack.Eric Anholt2012-07-111-8/+5
* i965: Add hardware context support.Kenneth Graunke2012-07-102-2/+9
* intel: Share common __DRIimage allocation codeKristian Høgsberg2012-07-051-40/+19
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