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path: root/src/mesa/drivers/dri/intel/intel_reg.h
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* i965: Use MI_FLUSH_DW for blt ring flush on sandybridgeZhenyu Wang2010-12-231-0/+2
* i965: sandybridge pipe control workaround before write cache flushZhenyu Wang2010-09-281-0/+12
* i965: Add support for GL_ALPHA framebuffer objects.Eric Anholt2010-06-101-0/+1
* intel: Correct value of S0_VB_OFFSET_MASK to match hardware docs.Ian Romanick2010-03-181-1/+3
* i915: Don't rely on fence regs when we don't have to.Eric Anholt2009-06-041-0/+13
* intel: restore old vertex submit paths for i8xx hardware.Dave Airlie2008-12-021-2/+2
* intel: fix i830 comment + backwards VB offsets.airlied2008-11-201-2/+2
* intel: fix i8xx vbo enable bitairlied2008-11-201-1/+1
* intel: Don't keep intel->pClipRects, and instead just calculate it when needed.Eric Anholt2008-10-281-0/+5
* i965: Add ARB_occlusion_query support.Eric Anholt2008-10-071-0/+19
* Revert "Revert "Merge branch 'drm-gem'""Dave Airlie2008-08-241-0/+129
* Revert "Merge branch 'drm-gem'"Dave Airlie2008-08-241-129/+0
* i915: Convert to using VBs instead of inline prims.Eric Anholt2008-06-231-0/+125
* Emit a flush after the swapbuffers blit, so contents end up on the screen.Eric Anholt2008-05-231-0/+4
* [965] Enable EXT_framebuffer_object.Eric Anholt2007-12-201-0/+3
* i965: correct the opcode of XY_SETUP_BLT_CMD. fix bug #12730Xiang, Haihao2007-11-121-1/+1
* Replace duplicated intel_reg.h with a shared header.Eric Anholt2007-10-041-0/+76
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