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* 965: Fix incorrect backface cullingKrzysztof Czurylo2008-08-214-15/+29
| | | | | Fix incorrect backface culling for OGL tunnel in wireframe and point mode.
* 965: Fix color clamping issuesKrzysztof Czurylo2008-08-211-0/+21
| | | | Patch is correctly applied this time.
* Formatting changes to ease application of patchesIan Romanick2008-08-211-4/+5
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* i965: use dri_bo_subdata in vertex upload to get pwrite used.Eric Anholt2008-08-211-26/+25
| | | | | | | | Otherwise, we would ping-pong objects to GTT and back as we did pwrite on indices (flushed and mapped to GTT) and mapped for vertices (moved back to CPU domain). Fixes bug #17180.
* i965: fixup format for TFP zero copyDave Airlie2008-08-201-2/+12
| | | | | (cherry picked from commit 9bc9e0ecb0fb2069b2c123e665eb2118e358098f which was lost in a merge)
* i965: make tex offset override work..Dave Airlie2008-08-201-15/+30
| | | | | | | should fix fd.o 14441 (cherry-picked from commit d4244683a61f66cfb78408a37cf2587587847f96 which was lost in a merge)
* i965: Enable GL_ARB_fragment_program_shadow and fix key->shadowtex_mask. ↵Xiang, Haihao2008-08-201-6/+3
| | | | (bug #16852, #16853)
* Merge branch 'drm-gem'Eric Anholt2008-08-0830-551/+329
|\ | | | | | | | | | | | | | | | | Conflicts: src/mesa/drivers/dri/intel/intel_span.c src/mesa/main/fbobject.c This converts the i915 driver to use the GEM interfaces for object management.
| * intel-gem: Update to new check_aperture API for classic mode.Eric Anholt2008-08-0825-266/+193
| | | | | | | | | | | | To do this, I had to clean up some of 965 state upload stuff. We may end up over-emitting state in the aperture overflow case, but that should be rare, and I'd rather have the simplification of state management.
| * 965: cleanups to state emission from aperture checking and state ordering.Eric Anholt2008-08-084-46/+3
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| * Merge branch 'master' into drm-gemIan Romanick2008-07-2511-33/+38
| |\ | | | | | | | | | | | | | | | | | | Conflicts: src/mesa/drivers/dri/common/dri_bufmgr.c src/mesa/drivers/dri/i965/brw_wm_surface_state.c
| * | Remove redundant initalization of MaxTextureUnitsIan Romanick2008-07-161-1/+0
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| * | drm-gem: Use new GEM ioctls for tiling state, and support new swizzle modes.Eric Anholt2008-07-112-11/+28
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| * | intel: Replace sprinkled intel_batchbuffer_flush with MI_FLUSH or nothing.Eric Anholt2008-06-261-63/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | Most of these were to ensure that caches got synchronized between 2d (or meta) rendering and later use of the target as a source, such as for texture miptree setup. Those are replaced with intel_batchbuffer_emit_mi_flush(), which just drops an MI_FLUSH. Most of the remainder were to ensure that REFERENCES_CLIPRECTS batchbuffers got flushed before the lock was dropped. Those are now replaced by automatically flushing those when dropping the lock.
| * | Merge commit 'origin/master' into drm-gemEric Anholt2008-06-247-419/+68
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| * \ \ Merge commit 'origin/master' into drm-gemEric Anholt2008-06-182-3/+8
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| * | | | [intel-gem] Chase domain flag renaming in the DRM.Eric Anholt2008-06-1111-26/+26
| | | | | | | | | | | | | | | | | | | | This is an API breakage only.
| * | | | Merge commit 'origin/master' into drm-gemKeith Packard2008-06-032-15/+16
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: src/mesa/drivers/dri/common/dri_bufmgr.h src/mesa/drivers/dri/intel/intel_bufmgr_ttm.c src/mesa/drivers/dri/intel/intel_bufmgr_ttm.h src/mesa/drivers/dri/intel/intel_ioctl.c
| * | | | | [intel] Convert drivers to using libdrm bufmgr code.Eric Anholt2008-06-0315-89/+74
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| * | | | | Emit a flush after the swapbuffers blit, so contents end up on the screen.Eric Anholt2008-05-231-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Otherwise, since the MI_FLUSH at the end of every batch had been removed, non-automatic-flushing chips (965) wouldn't get flushed and apps with static rendering would get partial screen contents until the server's blockhandler flush kicked in.
| * | | | | GEM: Remove already-disabled PIPE_CONTROL command.Eric Anholt2008-05-072-35/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This existed to get the icache flushed. However, GEM handles this for us now for sure, and we had disabled it prematurely anyway.
| * | | | | GEM: Make dri_emit_reloc take GEM domain flags instead of TTM flags.Eric Anholt2008-05-0713-29/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GEM flags are much more descriptive for what we need. Since this makes bufmgr_fake rather device-specific, move it to the intel common directory. We've wanted to do device-specific stuff to it before.
| * | | | | Add intel_bufmgr_gem for new graphics execution manager.Eric Anholt2008-05-022-1/+2
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* | | | | | i965: update TexSrcUnit for OPCODE_TXBXiang, Haihao2008-08-061-0/+5
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* | | | | | i965: Use program->SamplerUnits[] to get the appropriate texture unit.Xiang, Haihao2008-08-052-10/+15
| |_|_|_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | inst->TexSrcUnit is used as an index into program->SamplerUnits[] since the commit ade508312c701ce89d3c2cd717994dbbabb4f207, and program->SamplerUnits is a sampler-to-texture-unit mapping.
* | | | | i965: fixup format for TFP zero copyDave Airlie2008-07-251-2/+12
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* | | | | i965: make tex offset override work..Dave Airlie2008-07-251-19/+31
| | | | | | | | | | | | | | | | | | | | should fix fd.o 14441
* | | | | Revert "965: Fix color clamping issues"Ian Romanick2008-07-241-23/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit b993d539a76e7f1446890a85e4b61deec4d4162d. The patch was applied incorrectly. Actual fix coming soon. Sorry for the noise.
* | | | | 965: Fix partially transparent textures in Doom 3 engine gamesPawel Pieczul2008-07-231-7/+8
| | | | | | | | | | | | | | | | | | | | | | | | | Numbers of destination depth registers corrected (destination stencil register was sent as depth register).
* | | | | 965: Fix color clamping issuesPawel Pieczul2008-07-211-3/+23
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* | | | | intel: fix texture border issue. (bug #16697)Xiang, Haihao2008-07-181-1/+4
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* | | | | i965: official name for GM45 chipsetXiang, Haihao2008-07-088-24/+25
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* | | | | set ctx->Const.MaxVertexTextureImageUnits = 0Brian Paul2008-07-021-1/+1
| |_|_|/ |/| | | | | | | | | | | This disallows vertex shader texture sampling. See bugs 16157, 13838.
* | | | i965: Use the shared intel_pixel_copy.c.Eric Anholt2008-06-241-318/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This disables the textured copy implementation on 965, which didn't appear to work (mesa copypix demo, disable the blit path, move so that regions don't overlap and textured is used, and you get garbage). If we resurrect this for i965, I'd rather it used the 915-style metaops instead. Current metaops code left in place so that whoever picks it up has a reference.
* | | | intel: Same pixel function init for everyone now.Eric Anholt2008-06-241-8/+0
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* | | | intel: Avoid glBitmap software fallback for blending when no blending occurs.Eric Anholt2008-06-241-1/+1
| | | | | | | | | | | | | | | | | | | | Mesa demos tend to leave blending on but in GL_ONE/GL_ZERO, or GL_SRC_ALPHA/GL_ONE_MINUS_SRC_ALPHA with a source alpha of 1.0.
* | | | intel: Merge check_blit_fragment_ops between i915/i965.Eric Anholt2008-06-243-28/+2
| | | | | | | | | | | | | | | | Both had some useful bits for the other.
* | | | replace __inline and __inline__ with INLINE macroBrian Paul2008-06-213-65/+65
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* | | i965: apply commit 6c1a98e97affb2163e776551eb3a9e669ff99bbf to glslXiang, Haihao2008-06-101-1/+1
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* | | i965: fix OPCODE_TEX when additional ops are neededRoland Scheidegger2008-06-081-2/+7
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* | i965: Check fallback before accounting for index/vertex buffer size. fix #16028.Xiang, Haihao2008-05-201-10/+8
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* | i965: fix googleearth in classic mode.Dave Airlie2008-05-061-4/+5
| | | | | | | | In classic mode googleearth triggered a case where vbos weren't getting accounted properly.
* | i965: Don't cast the result of brw_prepare_vertices to an unsigned value.Xiang, Haihao2008-05-051-1/+3
|/ | | | Negative value means other errors, not aperture overflow. fix bug #15752
* [intel] Warnings fixes.Eric Anholt2008-05-022-1/+1
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* [intel] Merge intel_ioctl.h. Not sure how this slipped by in the .c merge.Eric Anholt2008-05-021-46/+0
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* [i965] short immediate values must be replicated to both halves of the dwordKeith Packard2008-04-251-2/+2
| | | | | | The 32-bit immediate value in the i965 instruction word must contain two copies of any 16-bit constants. brw_imm_uw and brw_imm_w just needed to copy the value into both halves of the immediate value instruction field.
* i965: fix DEPTH_TEXTURE_MODE (bug #14220)Xiang, Haihao2008-04-222-7/+10
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* [i965] This is to fix random crash in some maps of Ut2004 demo.Zou Nan hai2008-04-221-1/+1
| | | | | | | e.g. bridge of fate. If vs output is big, driver may fall back to use 8 urb entries for vs, unfortunally, for some unknown reason, if vs is working at 4x2 mode, 8 entries is not enough, may lead to gpu hang.
* i965: fixup depth buffer checkDave Airlie2008-04-181-1/+1
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* i965: fix vb aperture space checkDave Airlie2008-04-181-4/+8
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