| Commit message (Collapse) | Author | Age | Files | Lines |
|\
| |
| |
| |
| |
| | |
Conflicts:
src/mesa/main/context.c
|
| |
| |
| |
| |
| |
| |
| | |
Use _mesa_reference_framebuffer() and _mesa_unreference_framebuffer() functions
to be sure reference counting is done correctly. Additional assertions are
done too. Note _mesa_dereference_framebuffer() renamed to "unreference" as
that's more accurate.
|
| |
| |
| |
| |
| | |
call _mesa_dereference_framebuffer instead of _mesa_dereference_framebuffer
in i810, i915, i915tex, i965 drivers.
|
| |
| |
| |
| | |
call swsetup_Wakeup before falling back to software rendering
|
|/
|
|
|
|
| |
Mostly:
- update #includes
- update STATE_* token code
|
|
|
|
|
| |
Wait until getting the right fence if drm/i915 resets the
counter.
|
|\
| |
| |
| |
| |
| |
| | |
Conflicts:
src/mesa/main/texcompress_s3tc.c
src/mesa/tnl/t_array_api.c
|
| | |
|
| | |
|
| | |
|
| | |
|
| |\
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
into vbo-0.2
Conflicts:
src/mesa/array_cache/sources
src/mesa/drivers/dri/i965/brw_context.c
src/mesa/drivers/dri/i965/brw_draw.c
src/mesa/drivers/dri/i965/brw_fallback.c
src/mesa/drivers/dri/i965/brw_vs_emit.c
src/mesa/drivers/dri/i965/brw_vs_tnl.c
src/mesa/drivers/dri/mach64/mach64_context.c
src/mesa/main/extensions.c
src/mesa/main/getstring.c
src/mesa/tnl/sources
src/mesa/tnl/t_save_api.c
src/mesa/tnl/t_save_playback.c
src/mesa/tnl/t_vtx_api.c
src/mesa/tnl/t_vtx_exec.c
src/mesa/vbo/vbo_attrib.h
src/mesa/vbo/vbo_exec_api.c
src/mesa/vbo/vbo_save_api.c
src/mesa/vbo/vbo_save_draw.c
|
| | | |
|
| | | |
|
| | | |
|
| | | |
|
| | |
| | |
| | |
| | |
| | |
| | |
| | |
| | | |
The pool that the static buffer got allocated from was sized by pitch * height,
but the buffer generated from it had its size aligned to a tile boundary, so
allocation failed if pitch * height wasn't aligned. However, the 2d driver
ensures that the size ends at a tile boundary, so just pass the 2d driver's
buffer size rather than calculating it.
|
| | | |
|
| | | |
|
| | | |
|
| | | |
|
| | | |
|
| |/
|/|
| |
| |
| | |
The order of vertices in payload for quardstrip is (0, 1, 3, 2),
so the PV for quardstrip is c->reg.vertex[2].
|
| |
| |
| |
| |
| | |
vertex/fragment programs provided as const.
bmSetFenceLock should return bmSetFence value.
|
| |
| |
| |
| |
| | |
DRM versions before 1.8 do not include the necessary ioctls to support
GL_ARB_occlusion_query, don't enable it on these versions.
|
| |
| |
| |
| | |
Signed-off-by: Keith Packard <[email protected]>
|
| |
| |
| |
| | |
Signed-off-by: Keith Packard <[email protected]>
|
| |
| |
| |
| | |
Signed-off-by: Keith Packard <[email protected]>
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
There is an errata for Broadwater that threads don't have the instruction/loop
mask stacks initialized on thread spawn. In single program flow mode, those
stacks are not writable, so we can't initialize them. However, they do get
read during ELSE and ENDIF instructions. So, instead, replace branch
instructions in single program flow mode with predicated jumps (ADD to the ip
register), avoiding use of the more complicated branch instructions that may
fail. This is also a minor optimization as no ENDIF equivalent is necessary.
Signed-off-by: Keith Packard <[email protected]>
|
| |
| |
| |
| | |
Signed-off-by: Keith Packard <[email protected]>
|
| |
| |
| |
| |
| |
| | |
This fixes mis-rendering if back/depth fail to get set up as tiled. While it
probably won't ever be the case now that the pitch limits are loosened, this is
still the right thing to do.
|
| |
| |
| |
| | |
Use the i965 version as it has some fixes over the i915tex version.
|
| | |
|
| | |
|
| | |
|
| |
| |
| |
| | |
unification.
|
| |
| |
| |
| | |
Submitted by Gary Wong <[email protected]>
|
| | |
|
| | |
|
| |
| |
| |
| |
| |
| | |
(disallow). Slightly cleaned to disallow on all blend states for code
consiseness and turn a table lookup into a function to match other
code in the driver.
|
| | |
|
| |
| |
| |
| | |
after repositioning of INDEX value in BRW_ATTRIB enum.
|
| |
| |
| |
| |
| |
| | |
definition dangle (every vertex has a position). However
save->currentsz isn't properly maintained for this attribute, as there
is no current position value to track. Reported by Haihao Xiang.
|
| |
| |
| |
| | |
api_arrayelt.c. Reported by Haihao Xiang.
|
| |
| |
| |
| |
| | |
_mesa_add_named_constant() to indicate vector size (1, 2, 3 or 4).
Always 4 for now...
|
|/ |
|
|
|
|
|
|
|
|
| |
passing them to the kernel. This works because all drawing commands
in the 965 driver are emitted with the lock held and the batchbuffer
is always flushed prior to releasing the lock. This allows multiple
cliprects to be dealt with, without replaying entire batchbuffers and
redundantly re-emitting state.
|
|
|
|
|
| |
default/fallback functions are already plugged in by the call to
_mesa_init_driver_functions().
|
|
|
|
|
| |
This is already done by the preceeding call to _mesa_init_driver_functions()
which plugs in default functions like that.
|
|
|
|
|
|
| |
first element in the interleaved group. Add a test to catch cases
where this isn't true and use per-array uploads instead. Fixes compiz
glitches on x64.
|