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path: root/src/mesa/drivers/dri/i965
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* i965: Check the INTEL_USE_NIR environment variable once at context creationJason Ekstrand2015-04-033-4/+14
* nir: Add a src_get_parent_instr functionJason Ekstrand2015-04-031-14/+2
* i965: Use the tex projector lowering pass instead of hand-rolling it.Eric Anholt2015-04-031-10/+4
* i965: Rename do_<stage>_prog to brw_compile_<stage>_prog (and export)Carl Worth2015-04-029-32/+51
* i965: Split out per-stage dirty-bit checking into separate functionsCarl Worth2015-04-024-35/+59
* i965: Split out brw_<stage>_populate_key into their own functionsCarl Worth2015-04-023-40/+64
* i965/generator: Get rid of the ! in the unreachable statementJason Ekstrand2015-04-021-1/+1
* i965/fs: Relax type check in cmod propagation.Matt Turner2015-04-011-1/+3
* i965: Use the same nir options for all gensJason Ekstrand2015-04-011-10/+2
* i965/nir: Run DCE again before going out of SSAJason Ekstrand2015-04-011-0/+2
* i965/nir: Run the ffma peephole after the rest of the optimizationsJason Ekstrand2015-04-012-2/+11
* nir: Add a dedicated ffma peephole optimizationJason Ekstrand2015-04-011-0/+2
* nir/algebraic: Add a seperate section for "late" optimizationsJason Ekstrand2015-04-011-0/+3
* i965: Handle scratch accesses where reladdr also points to scratch spaceIago Toral Quiroga2015-04-012-26/+76
* egl: add initial EGL_MESA_image_dma_buf_export v2.4Dave Airlie2015-04-011-2/+23
* i965/state: Remove brw->state.dirtyJordan Justen2015-03-312-7/+0
* i965/state: Don't use brw->state.dirty.mesaJordan Justen2015-03-315-12/+11
* i965/state: Don't use brw->state.dirty.brwJordan Justen2015-03-3133-83/+82
* i965/state: Add compute pipeline with empty atom listsJordan Justen2015-03-313-1/+37
* i965/state: Only upload render programs for render state uploadsJordan Justen2015-03-311-20/+25
* i965/state: Create separate dirty state bits for each pipelineJordan Justen2015-03-312-27/+75
* i965/state: Support multiple pipelines in brw->num_atomsJordan Justen2015-03-312-39/+65
* i965/state: Rename brw_clear_dirty_bits to brw_render_state_finishedJordan Justen2015-03-313-3/+3
* i965/state: Rename brw_upload_state to brw_upload_render_stateJordan Justen2015-03-313-10/+11
* i965/fs: Allow CSE to handle MULs with negated arguments.Matt Turner2015-03-311-5/+37
* i965: Mark brw_inst_bits' brw_inst* parameter const.Matt Turner2015-03-311-12/+12
* i965/skl: Avoid using the 1D stencil layout for stencil-only imagesNeil Roberts2015-03-311-1/+2
* i965/nir: Use NIR for ARB_vertex_program support on Gen8+.Kenneth Graunke2015-03-271-4/+10
* i965: Move env_var_as_boolean to intel_debug.c.Kenneth Graunke2015-03-273-22/+29
* i965/fs: Add ARB_fragment_program support to the NIR backend.Kenneth Graunke2015-03-272-26/+51
* i965/skl: Don't use the PMA depth stall workaroundBen Widawsky2015-03-271-1/+6
* i965/skl: Disable partial resolve in VCBen Widawsky2015-03-272-0/+11
* i965: Drop unnecessary brw->gen >= 8 check from scalar VS code.Kenneth Graunke2015-03-251-1/+1
* i965/fs: Implement texture projection support.Kenneth Graunke2015-03-251-1/+10
* i965/fs: Rename offset to tex_offset to avoid shadowing offset().Kenneth Graunke2015-03-251-4/+4
* glsl: Allow vector logic ops to be generated.Matt Turner2015-03-241-6/+3
* i965: add the remaining files to the tarballEmil Velikov2015-03-241-0/+3
* i965/vec4: Fix handling of multiple register reads and writes in dead_code_el...Francisco Jerez2015-03-231-7/+15
* i965/vec4: Calculate live intervals with subregister granularity.Francisco Jerez2015-03-232-33/+46
* i965/vec4: Define helpers to calculate the common live interval of a range of...Francisco Jerez2015-03-234-29/+31
* i965/vec4: Define helper functions to convert a register to a variable index.Francisco Jerez2015-03-234-28/+34
* i965/vec4: Don't lose the force_writemask_all flag during CSE.Francisco Jerez2015-03-231-0/+3
* i965/vec4: Fix handling of multiple register reads and writes in opt_cse().Francisco Jerez2015-03-231-8/+17
* i965/vec4: Fix handling of multiple register reads and writes during copy pro...Francisco Jerez2015-03-231-3/+6
* i965/vec4: Fix handling of multiple register reads and writes in split_virtua...Francisco Jerez2015-03-231-9/+6
* i965/vec4: Fix handling of multiple register reads and writes in opt_register...Francisco Jerez2015-03-231-14/+10
* i965: Define method to check whether a backend_reg is inside a given range.Francisco Jerez2015-03-233-4/+11
* i965/vec4: Remove dependency of vec4_live_variables on the visitor.Francisco Jerez2015-03-232-7/+8
* i965/vec4: Trivial copy propagate clean-up.Francisco Jerez2015-03-231-5/+6
* i965/vec4: Add argument index and type checks to SEL saturate propagation.Francisco Jerez2015-03-231-1/+4
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