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path: root/src/mesa/drivers/dri/i965
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* dri/intel: Split out DRI2 buffer update code to separate functionKeith Packard2013-11-071-3/+19
* i965: Wire up initial support for DRI_RENDERER_QUERY extensionIan Romanick2013-11-071-0/+83
* i965: Refactor the renderer string creation out of intelGetStringIan Romanick2013-11-072-13/+23
* i965: Refactor the vendor string out of intelGetStringIan Romanick2013-11-072-2/+5
* i965: Enable DRI_Robustness extensionIan Romanick2013-11-071-0/+5
* i965: Propagate the GPU reset notifiction strategy down into the driverIan Romanick2013-11-072-5/+29
* i965: Add function to query the GPU reset status for a contextIan Romanick2013-11-073-0/+71
* i965: Handle __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS flagIan Romanick2013-11-071-1/+6
* mesa/dri: Move context flag validation down into the driversIan Romanick2013-11-071-0/+5
* mesa/dri: Add basic plumbing for GLX_ARB_robustness reset notification strategyIan Romanick2013-11-072-0/+7
* i965/gen7: Expose ARB_shader_atomic_counters.Francisco Jerez2013-11-072-0/+13
* Revert "i965: Add support for GL_AMD_performance_monitor on Ironlake."Kenneth Graunke2013-11-075-413/+0
* i965: Add an implementation of intel_miptree_map using streaming loads.Matt Turner2013-11-071-0/+85
* i965: Fix 'SIMD16 only' dispatch of fragment shader in case of sample shadingAnuj Phogat2013-11-072-14/+25
* i965: Enable ARB_vertex_type_10f_11f_11f_rev on Gen6+.Chris Forbes2013-11-081-0/+1
* i965: add support for UNSIGNED_INT_10F_11F_11F_REV vertex attribsChris Forbes2013-11-081-0/+2
* i965: Avoid flushing the batch for every blorp op.Eric Anholt2013-11-074-17/+50
* i965: Use has_surface_tile_offset in depth/stencil alignment workaround.Kenneth Graunke2013-11-071-2/+2
* i965/gen6: Don't allow SIMD16 dispatch in 4x PERPIXEL mode with computed depth.Paul Berry2013-11-061-1/+33
* i965: Use unreachable() to silence a compiler warning.Matt Turner2013-11-061-0/+1
* i965/fs: Gen4-5: Implement alpha test in shader for MRTChris Forbes2013-11-063-0/+58
* i965/fs: Gen4-5: Setup discard masks for MRT alpha testChris Forbes2013-11-062-2/+2
* i965: Gen4-5: Include alpha func/ref in program keyChris Forbes2013-11-062-0/+18
* i965: Gen4-5: Don't enable hardware alpha test with MRTChris Forbes2013-11-061-1/+2
* i965: Combine {brw,gen7}_update_texture_buffer_surface() functions.Kenneth Graunke2013-11-053-40/+5
* i965: Unvirtualize brw_create_constant_surface; delete Gen7+ variant.Kenneth Graunke2013-11-054-45/+17
* i965: Use the new emit_buffer_surface_state() vtable entry.Kenneth Graunke2013-11-051-10/+10
* i965: Virtualize emit_buffer_surface_state().Kenneth Graunke2013-11-053-4/+20
* i965: Fix compiler warning.Courtney Goeltzenleuchter2013-11-052-2/+2
* i965: Tell the unit states how many binding table entries we have.Eric Anholt2013-11-057-5/+22
* i965: Fix context initialization after 2f896627175384fd5Eric Anholt2013-11-051-3/+6
* i965: Eliminate the saved_viewport wrapperIan Romanick2013-11-052-7/+5
* i965: Expose brw_reg_from_fs_reg() to other files.Kenneth Graunke2013-11-042-1/+3
* i965: Combine gen6_clip_state.c and gen7_clip_state.c.Kenneth Graunke2013-11-043-140/+42
* i965/gen7: Add instruction latency estimates for untyped atomics and reads.Francisco Jerez2013-11-041-0/+39
* i965/gen7: Handle atomic instructions from the VEC4 back-end.Francisco Jerez2013-11-042-2/+110
* i965/gen7: Handle atomic instructions from the FS back-end.Francisco Jerez2013-11-042-2/+141
* i965: Add a 'has_side_effects' back-end instruction predicate.Francisco Jerez2013-11-045-17/+34
* i965: Add driconf option clamp_max_samplesChad Versace2013-11-032-12/+67
* i965: Fix logic_op check.Vinson Lee2013-11-031-2/+1
* i965: Initialize vec4_visitor member variables.Vinson Lee2013-11-031-1/+6
* i965: Enable ARB_sample_shading on intel hardware >= gen6Anuj Phogat2013-11-011-0/+1
* i965/gen7: Enable the features required for GL_ARB_sample_shadingAnuj Phogat2013-11-011-5/+56
* i965/gen6: Enable the features required for GL_ARB_sample_shadingAnuj Phogat2013-11-011-5/+56
* i965: Add FS backend for builtin gl_SampleMask[]Anuj Phogat2013-11-015-0/+61
* i965: Add FS backend for builtin gl_SampleIDAnuj Phogat2013-11-017-0/+94
* i965: Add FS backend for builtin gl_SamplePositionAnuj Phogat2013-11-016-0/+95
* i965: Don't do vector splitting for ir_var_system_valueAnuj Phogat2013-11-011-0/+1
* i965/fs: Optimize saturating SEL.G(E) with imm val <= 0.0f.Matt Turner2013-11-011-0/+14
* i965/fs: Optimize saturating SEL.L(E) with imm val >= 1.0.Matt Turner2013-11-011-0/+22
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