summaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers/dri/i965
Commit message (Collapse)AuthorAgeFilesLines
* i965: Always have the struct gl_program * in the backend visitor.Eric Anholt2013-10-154-14/+15
| | | | | | | vec4 already had it, so put it in the FS, too. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965: Drop a couple of unused defines.Eric Anholt2013-10-151-3/+0
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965: Remove dead arguments from prog_data_compare.Eric Anholt2013-10-158-17/+8
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965: Don't copy prop source mods into instructions that can't take them.Matt Turner2013-10-144-0/+26
|
* i965: Merge intel_context.h into brw_context.h.Kenneth Graunke2013-10-132-172/+120
| | | | | | | | v2: Keep the random 32-bit only version of memcpy, since Ian says I can't delete it without data proving it isn't useful. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Delete our copy of likely/unlikely macros.Kenneth Graunke2013-10-131-10/+0
| | | | | | | | brw_context.h includes imports.h which includes compiler.h which already defines these. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* mesa: Move U_FIXED/S_FIXED macros from i965 to macros.h.Kenneth Graunke2013-10-131-26/+0
| | | | | | | | | | | | | | | | | These make it easy to convert a floating point value to a fixed point numbers. The second parameter is the number of bits used for the fractional part of the number. It looks like core Mesa has similar functions already, but none that allows an arbitrary number of fractional bits. The more generic version is probably useful to everyone. r600g apparently has an identical copy of the S_FIXED macro, but doesn't include this file. I'm not sure what to do about that, so I'm just going to leave it for now. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Move need_workaround_flush = true to intel_batchbuffer_init.Kenneth Graunke2013-10-132-2/+2
| | | | | | | | intel_batchbuffer_init() sets up initial batchbuffer state; it seems like a reasonable place to initialize this flag. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Move DriverFlag initialization to brw_init_state().Kenneth Graunke2013-10-132-4/+5
| | | | | | | | Configuring which dirty flags we want sounds like a job for brw_init_state(). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Merge intelInitContext into brwCreateContext.Kenneth Graunke2013-10-132-83/+43
| | | | | | | The split here was completely arbitrary. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Move viewport driver hook setup to brw_init_driver_functions.Kenneth Graunke2013-10-131-12/+12
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Make brwInitFunctions take brw_context rather than intel_screen.Kenneth Graunke2013-10-131-6/+6
| | | | | | | | | | | | It actually just wants generation checking, and brw->gen is the usual way of doing that. In the future, we'll also want to check brw->hw_ctx, which isn't available from the screen. While we're changing the function signature, convert from camel case to our usual naming conventions. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Merge intelInitFunctions() and brwInitFunctions().Kenneth Graunke2013-10-131-10/+3
| | | | | | | They do exactly the same thing. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Merge intel_context.c into brw_context.c.Kenneth Graunke2013-10-133-730/+685
| | | | | | | | | | | There's no point in having two files for context functions. This patch moves the code from intel_context.c into brw_context.c unmodified (other than whitespace fixes). Right now, this looks silly; future patches will merge functions and tidy things up. Signed-off-by: Kenneth Graunke <[email protected]>
* i965: Move memset of TextureFormatSupported to brw_init_surface_formats.Kenneth Graunke2013-10-132-3/+2
| | | | | | | | brw_init_surface_formats already sets entries in TextureFormatsSupported to true; it may as well take care of initializing it to false too. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Remove has_aa_line_parameters.Kenneth Graunke2013-10-133-3/+5
| | | | | | | | This flag is only used in one place, and is only set on one platform. Just check for original Gen4 in the relevant function. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Move state setup from brwCreateContext to brw_init_state().Kenneth Graunke2013-10-132-8/+8
| | | | | | | This seems like a better place for it, and helps clean up brwCreateContext (which is full of a lot of random stuff). Signed-off-by: Kenneth Graunke <[email protected]>
* i965: Remove the brw_context::emit_state_always flag.Kenneth Graunke2013-10-133-5/+2
| | | | | | | | This was always set to false, and is only used for debugging. To enable it, simply change the if (0) block and recompile. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Move hardware feature flags to brw_device_info.Kenneth Graunke2013-10-133-4/+18
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Move device quirks to brw_device_info.Kenneth Graunke2013-10-133-8/+27
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Move hardware limits to brw_device_info.Kenneth Graunke2013-10-133-83/+117
| | | | | | | | | Since each kind of device has its own brw_device_info structure, we can simply store the URB and thread limits there. This eliminates all the large if-ladders, and simplifies the context initialization code quite a bit. Signed-off-by: Kenneth Graunke <[email protected]>
* i965: Replace some intel_screen fields with brw_device_info references.Kenneth Graunke2013-10-134-62/+22
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Delete the INTEL_SEPARATE_STENCIL override.Kenneth Graunke2013-10-131-27/+0
| | | | | | | | | This option was useful during initial development, but it's been ages since I've heard of anyone using it. Plus, Gen7+ mandates separate stencil, so it was really only useful on Sandybridge anyway. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Add a new brw_device_info structure.Kenneth Graunke2013-10-136-0/+150
| | | | | | | | | | | | | | | The idea is that struct brw_device_info should store statically-known information about hardware features. Using the new family name in the PCI ID table, we can easily grab the right structure. This is basically the equivalent of intel_device_info in the kernel. This patch also makes the new structure available from intel_screen, but nothing uses it. Right now, it looks very redundant with existing fields, but that will change. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Add the family name to the PCI ID table.Kenneth Graunke2013-10-131-1/+1
| | | | | | | | I removed this a while ago, since we never used it, but I'm finally resurrecting the idea in the next commits. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Remove #define name from PCI ID table.Kenneth Graunke2013-10-131-1/+1
| | | | | | | | | | Nothing uses the #define name, and it's not terribly useful - the numerical ID serves the same purpose. The only thing we could really do with it is generate slightly prettier preprocessed code. But who looks at that? Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Pull most driconf option handling into a centralized function.Kenneth Graunke2013-10-132-47/+61
| | | | | | | | | | | | | Using a helper function clarifies the context initialization code. I would've liked to completely centralize it, but moving the optionCache code from intelInitExtensions into here would've required setting flags in the context, which seems like a waste. v2: Rebase for the introduction of disable_derivative_optimization. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Move a bunch of code from intelInitContext to brwCreateContext.Kenneth Graunke2013-10-132-50/+44
| | | | | | | | | | | | Now that intelInitContext isn't shared between i915 and i965, the split is fairly arbitrary. This patch moves a bunch of the basic context creation and generation checking code up to the top-level function (and slightly earlier). More will follow. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Update the comment about viewport hacks.Kenneth Graunke2013-10-131-1/+7
| | | | | | | It wasn't clear that this was necessary for EGL, or why. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Pull out INTEL_DEBUG handling into new intel_debug.[ch] files.Kenneth Graunke2013-10-135-128/+200
| | | | | | | | | | | | | Now that there isn't an intel_context structure, the split between brw_context.[ch] and intel_context.[ch] is rather awkward and arbitrary. Removing intel_context.[ch] seems desirable, but not everything really belongs in brw_context.[ch], either. Moving INTEL_DEBUG handling into separate intel_debug.[ch] files should make them relatively easy to find. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Rename brwCreateContext's error parameter to dri_ctx_error.Kenneth Graunke2013-10-131-3/+3
| | | | | | | | "error" is a very generic name. dri_ctx_error is the name used in intelInitContext(), which is more specific. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* dri: Move i965-specific context flag logic to dri common.Eric Anholt2013-10-131-8/+0
| | | | | Nobody else yet can do a forward context anyway, but others should be able to do debug contexts, and those would have just had no effect currently.
* i965: Turn on GLSL 1.50 and GL 3.2 support for i965 gen7.Paul Berry2013-10-122-2/+4
| | | | | | | | | | | | Geometry shaders were the last thing we needed to finish before turning on GLSL 1.50 and GL 3.2 support. They are now working well, with just a few piglit failures left to fix. Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965: extend fast texture uploadFrank Henigman2013-10-101-69/+402
| | | | | | | | | | | | | | | | | | | | | Extend the fast texture upload from BGRA X-tiled to include RGBA, Alpha/Luminance, and Y-tiled. Speed improvements, measured with mesa demos teximage program, on 256 x 256 texture, in MB/s, on a Sandy Bridge (Ivy is comparable): before after increase BGRA/X-tiled 3266 4524 1.39x BGRA/Y-tiled 1739 3971 2.28x RGBA/X-tiled 474 4694 9.90x RGBA/Y-tiled 477 3368 7.06x L/X-tiled 1268 1516 1.20x L/Y-tiled 1439 1581 1.10x v2: Cosmetic changes only: reformat and reword comments, make doxygen-friendly, rename variables, use existing macros, add an assert. Signed-off-by: Frank Henigman <[email protected]> Reviewed-and-tested-by: Chad Versace <[email protected]>
* i965: Clean up error handling for context creation.Eric Anholt2013-10-104-34/+8
| | | | | | | | | | | | | | | The intel_screen.c used to be a dispatch to one of 3 driver functions, but was down to 1, so it was kind of a waste. In addition, it was trying to free all of the data that might have been partially freed in the kernel 3.6 check (which comes after intelInitContext, and thus might have had driverPrivate set and result in intelDestroyContext() doing work on the freed data). By moving the driverPrivate setup earlier, we can use intelDestroyContext() consistently and avoid such problems in the future. v2: Adjust the prototype of brwCreateContext to use the proper enum (fixing a compiler warning in some builds) Reviewed-by: Kenneth Graunke <[email protected]> (v1)
* intel: Remove silly check for !bufmgr.Eric Anholt2013-10-101-6/+0
| | | | | | | | If bufmgr didn't get created, then screen creation failed, and we never should have got here in the first place. This was added by Chris Wilson in 2010 with no explanation for why it would be needed. Reviewed-by: Kenneth Graunke <[email protected]>
* dri: Move API version validation into dri/common.Eric Anholt2013-10-103-80/+13
| | | | | | | | | | | | | | | | | i965, i915, radeon, r200, swrast, and nouveau were mostly trying to do the same logic, except where they failed to. Notably, swrast had code that appeared to try to enable GLES1/2 but forgot to set api_mask (thus preventing any gles context from being created), and the non-intel drivers didn't support MESA_GL_VERSION_OVERRIDE. nouveau still relies on _mesa_compute_version(), because I don't know what its limits actually are, and gallium drivers don't declare limits up front at all. I think I've heard talk about doing so, though. v2: Compat max version should be 30 (noted by Ken) Drop r100's custom max version check, too (noted by Emil Velikov) Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Convert gen7 to using GRFs for texture messages.Eric Anholt2013-10-109-109/+170
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Looking at Lightsmark's shaders, the way we used MRFs (or in gen7's case, GRFs) was bad in a couple of ways. One was that it prevented compute-to-MRF for the common case of a texcoord that gets used exactly once, but where the texcoord setup all gets emitted before the texture calls (such as when it's a bare fragment shader input, which gets interpolated before processing main()). Another was that it introduced a bunch of dependencies that constrained scheduling, and forced waits for texture operations to be done before they are required. For example, we can now move the compute-to-MRF interpolation for the second texture send down after the first send. The downside is that this generally prevents remove_duplicate_mrf_writes() from doing anything, whereas previously it avoided work for the case of sampling from the same texcoord twice. However, I suspect that most of the win that originally justified that code was in avoiding the WAR stall on the first send, which this patch also avoids, rather than the small cost of the extra instruction. We see instruction count regressions in shaders in unigine, yofrankie, savage2, hon, and gstreamer. Improves GLB2.7 performance by 0.633628% +/- 0.491809% (n=121/125, avg of ~66fps, outliers below 61 dropped). Improves openarena performance by 1.01092% +/- 0.66897% (n=425). No significant difference on Lightsmark (n=44). v2: Squash in the fix for register unspilling for send-from-GRF, fixing a segfault in lightsmark. Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Matt Turner <[email protected]>
* i965/fs: Allocate more register classes on gen7.Eric Anholt2013-10-102-18/+30
| | | | | | | | | | | | | | | | For texturing from GRFs, we now have payloads of arbitrary sizes up to the message length limit. v2 (Kenneth Graunke): Rebase on intel_context -> brw_context change. v3: Add some comment text. v4: Change some magic 16s to BRW_MAX_MRF (noted by Ken). Leave the 11, which is the magic "max sampler message length". BRW_MAX_MRF sizing on the little int arrays is retained because I could see us needing to extend in the future if we move to GRFs for FB writes (those go to at least 12 long in a quick scan of the specs) Reviewed-by: Kenneth Graunke <[email protected]> (v2) Acked-by: Matt Turner <[email protected]>
* i965/fs: Use per-channel interference for register_coalesce_2().Eric Anholt2013-10-103-23/+26
| | | | | | | | | | This will let us coalesce into texture-from-GRF arguments, which would otherwise be prevented due to the live interval for the whole vgrf extending across all the MOVs setting up the channels of the message v2 (Kenneth Graunke): Rebase for renames. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Use the new per-channel live ranges for dead code elimination.Eric Anholt2013-10-102-3/+16
| | | | | | v2 (Kenneth Graunke): Rebase on s/live_variables/live_intervals/g. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Keep a copy of the live variables class around.Eric Anholt2013-10-103-12/+17
| | | | | | | | | | | Now optimization passes will be able to look at the per-channel ranges. v2: Rebase on various optimization pass changes. v3 (Kenneth Graunke): Rename live_variables to live_intervals; split introduction of invalidate_live_intervals() into a separate patch. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Invalidate live intervals when compacting; don't fix them.Kenneth Graunke2013-10-101-4/+1
| | | | | | | | | | | | When compacting the list of VGRFs, we patch up the live interval ranges (which are indexed by VGRF number). Unfortunately, once we make per-component data available, this will become too complicated to maintain. Instead, simply invalidate them. This was pulled out of a patch by Eric Anholt. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965/fs: Remove start/end aliases in compute_live_intervals().Kenneth Graunke2013-10-101-8/+6
| | | | | | | | | | | | | In compute_live_intervals(), start and end are shorter names for the virtual_grf_start and virtual_grf_end class members. Now that the fs_live_intervals class has arrays named start and end which are indexed by var, rather than VGRF, reusing the name is confusing. Plus, most of the code has been factored out, so using the long names isn't as inconvenient. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965/fs: Track live variable ranges on a per-channel level.Eric Anholt2013-10-102-74/+85
| | | | | | | | | | | This is the information we'll actually use to replace the virtual_grf_start[]/end[] arrays. No change in shader-db. v2 (Kenneth Graunke): Rebase; minor comment updates. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Factor def[]/use[] setup out to a separate function.Eric Anholt2013-10-102-16/+43
| | | | | | | | | These blocks are about to grow some more code, and the indentation was getting out of hand. v2 (Kenneth Graunke): Rebase, minor typo fixes and style changes. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Create a helper function for invalidating live intervals.Kenneth Graunke2013-10-107-15/+21
| | | | | | | | | | For now, this simply sets live_intervals_valid = false, but in the future it will do something more sophisticated. Based on a patch by Eric Anholt. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965/fs: Do live variables dataflow analysis on a per-channel level.Eric Anholt2013-10-102-17/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This significantly improves our handling of VGRFs of size > 1. Previously, we only marked VGRFs as def'd if the whole register was written by a single instruction. Large VGRFs which were written piecemeal would not be considered def'd at all, even if they were ultimately completely written. Without being def'd, these were then marked "live in" to the basic block, often extending the range to preceding blocks and sometimes even the start of the program. The new per-component tracking gives more accurate live intervals, which makes register coalescing more effective. In the future, this should help with texturing from GRFs on Gen7+. A sampler message might be represented by a 2-register VGRF which holds the texture coordinates. If those are incoming varyings, they'll be produced by two PLN instructions, which are piecemeal writes. No reduction in shader-db instruction counts. However, code which prints the live interval ranges does show that some VGRFs now have smaller (and more correct) live intervals. v2: Rebase on current send-from-GRF code requiring adding extra use[]s. v3: Rebase on live intervals fix to include defs in the end of the interval. v4 (Kenneth Graunke): Rebase; split off a few preparatory patches; add lots of comments; minor style changes; rewrite commit message. v5 (Eric Anholt): whitespace nit. Written-by: Eric Anholt <[email protected]> [v1-3] Signed-off-by: Kenneth Graunke <[email protected]> [v4] Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> (v4)
* i965/fs: Rename num_vars to num_vgrfs in live interval analysis.Kenneth Graunke2013-10-102-8/+7
| | | | | | | | | num_vars was shorthand for the number of virtual GRFs. num_vgrfs is a bit clearer. Plus, the next patch will introduce "vars" which are distinct from vgrfs. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965/fs: Short-circuit a loop in live variable analysis.Kenneth Graunke2013-10-101-5/+6
| | | | | | | | This has no functional effect, but should make subsequent changes a little simpler. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-21 04:20:56 +0000