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path: root/src/mesa/drivers/dri/i965
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* i965: Update 3DSTATE_CLIP for Broadwell.Kenneth Graunke2014-01-312-3/+8
* i965: Rework vertex uploads for Broadwell.Kenneth Graunke2014-01-317-3/+274
* i965: Update STATE_BASE_ADDRESS for Broadwell.Kenneth Graunke2014-01-314-1/+76
* i965: Update 3DSTATE_PS, 3DSTATE_WM, and add 3DSTATE_PS_EXTRA.Kenneth Graunke2014-01-315-2/+237
* i965: Rework 3DSTATE_VS for Broadwell.Kenneth Graunke2014-01-315-3/+144
* i965: Add the new 3DSTATE_PS_BLEND state packet.Kenneth Graunke2014-01-315-0/+142
* i965: Replace DEPTH_STENCIL_STATE with Gen8's 3DSTATE_WM_DEPTH_STENCIL.Kenneth Graunke2014-01-315-1/+131
* i965: Update SF, SBE, and RASTER state for Broadwell.Kenneth Graunke2014-01-315-2/+311
* i965: Bump generation assertions on workaround flushes.Kenneth Graunke2014-01-311-2/+2
* i965: Duplicate gen7_atoms to gen8_atoms.Kenneth Graunke2014-01-311-1/+79
* dri3, i915, i965: Add __DRI_IMAGE_FOURCC_SARGB8888Keith Packard2014-01-301-0/+3
* i965/fs: Add a saturation propagation optimization pass.Matt Turner2014-01-284-0/+107
* i965: Add can_do_saturate() method to backend_instruction.Matt Turner2014-01-282-0/+45
* i965: Ignore 'centroid' interpolation qualifier in case of persample shadingAnuj Phogat2014-01-281-1/+2
* mesa: Fix Type A _INT formats to MESA_FORMAT naming standardMark Mueller2014-01-271-20/+20
* mesa: Fix MESA_FORMAT names containg SIGNEDMark Mueller2014-01-272-19/+19
* mesa: Fix MESA_FORMAT names with ALPH, INTENSITY, and LUMINANCEMark Mueller2014-01-271-35/+35
* mesa: Change many Type P MESA_FORMATs to meet naming specMark Mueller2014-01-2712-83/+83
* mesa: Change many Type A MESA_FORMATs to meet naming standardMark Mueller2014-01-2712-72/+72
* mesa: Rename 4 color component unsigned byte MESA_FORMATsMark Mueller2014-01-2710-34/+34
* mesa: change gl_format to mesa_formatMark Mueller2014-01-2717-58/+58
* mesa: GL_EXT_framebuffer_blit is not optionalIan Romanick2014-01-271-1/+0
* i965: Don't store qpitch / 4 as mt->qpitch for compressed surfaces.Kenneth Graunke2014-01-252-5/+8
* i965/gen7: Use to the correct program when uploading transform feedback state.Paul Berry2014-01-232-10/+6
* i965: Remove *_generator::shader field; use prog field instead.Paul Berry2014-01-237-18/+8
* i965/blorp: switch eu-emitter to use FS IR and fs_generatorTopi Pohjolainen2014-01-233-120/+84
* i965/fs: add support for BRW_OPCODE_AVG in fs_generatorTopi Pohjolainen2014-01-231-0/+3
* i965/fs: introduce blorp specific rt-write for fs_generatorTopi Pohjolainen2014-01-234-0/+23
* i965/fs: allow unit tests to dump the final patched assemblyTopi Pohjolainen2014-01-232-8/+10
* i965/blorp: wrap brw_IF/ELSE/ENDIF() into eu-emitterTopi Pohjolainen2014-01-232-9/+23
* i965/blorp: wrap RNDD (/brw_RNDD(&func, /emit_rndd(/)Topi Pohjolainen2014-01-232-2/+8
* i965/blorp: wrap FRC (/brw_FRC(&func, /emit_frc(/)Topi Pohjolainen2014-01-232-4/+10
* i965/blorp: wrap MUL (/brw_MUL(&func, /emit_mul(/)Topi Pohjolainen2014-01-232-9/+16
* i965/blorp: wrap OR (/brw_OR(&func, /emit_or(/)Topi Pohjolainen2014-01-232-24/+31
* i965/blorp: wrap SHL (/brw_SHL(&func, /emit_shl(/)Topi Pohjolainen2014-01-232-12/+19
* i965/blorp: wrap SHR (/brw_SHR(&func, /emit_shr(/)Topi Pohjolainen2014-01-232-12/+19
* i965/blorp: wrap ADD (/brw_ADD(&func, /emit_add(/)Topi Pohjolainen2014-01-232-18/+32
* i965/blorp: wrap AND (/brw_AND(&func, /emit_and(/)Topi Pohjolainen2014-01-232-39/+46
* i965/blorp: wrap MOV (/brw_MOV(&func, /emit_mov(/)Topi Pohjolainen2014-01-232-35/+45
* i965/blorp: wrap emission of if-equal-assignmentTopi Pohjolainen2014-01-232-24/+12
* i965/blorp: wrap emission of conditional assignmentTopi Pohjolainen2014-01-232-15/+15
* i965/blorp: move emission of sample combining into eu-emitterTopi Pohjolainen2014-01-233-9/+24
* i965/blorp: move emission of rt-write into eu-emitterTopi Pohjolainen2014-01-233-10/+28
* i965/blorp: move emission of texture lookup into eu-emitterTopi Pohjolainen2014-01-233-22/+60
* i965/fs: introduce non-compressed equivalent of tex_cmsTopi Pohjolainen2014-01-234-0/+13
* i965: rename tex_ms to tex_cmsTopi Pohjolainen2014-01-2310-17/+17
* i965/blorp: move emission of pixel kill into eu-emitterTopi Pohjolainen2014-01-233-25/+38
* i965/blorp: introduce separate eu-emitter for blit compilerTopi Pohjolainen2014-01-234-38/+113
* i965: Support 32 texture image units on Haswell+.Kenneth Graunke2014-01-222-4/+7
* i965/fs: Switch from BRW_MAX_TEX_UNIT to the actual limit.Kenneth Graunke2014-01-221-1/+2