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path: root/src/mesa/drivers/dri/i965
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* mesa: Remove inclusion of compiler.h from mtypes.h.Vinson Lee2010-07-311-0/+2
* intel: Declare the various tracked state variables using "extern"Kristian Høgsberg2010-07-291-62/+62
* intel: Remove unused intel/server filesKristian Høgsberg2010-07-271-1/+1
* i965: Fix reversed naming of the operations in compute-to-mrf optimization.Eric Anholt2010-07-263-6/+11
* i965: Clean up a few magic numbers to use brw_defines.h defs.Eric Anholt2010-07-263-18/+20
* i965: Use MIN2, MAX2 instead of rolling our own.Eric Anholt2010-07-261-15/+12
* i965: Fold the "is arithmetic" bit of 965 opcodes into the opcode list.Eric Anholt2010-07-261-50/+26
* i965: Remove some duped register size/count definitionsEric Anholt2010-07-262-34/+26
* i965: Move the GRF-to-MRF optimizations to brw_optimize.c.Eric Anholt2010-07-263-619/+618
* i965: Improve (i.e. remove) some grf-to-mrf unnecessary movesBenjamin Segovia2010-07-261-2/+626
* i965: Allow VS MOVs to use immediate constants.Eric Anholt2010-07-261-0/+1
* i965: Cleanly fail programs with unsupported array access.Eric Anholt2010-07-231-1/+28
* i965: Add support for VS relative addressing of temporary arrays.Eric Anholt2010-07-231-2/+49
* i965: Respect VS/VP point size result when enabled.Eric Anholt2010-07-221-3/+4
* i965: Fix the disasm output for da16 src widths.Eric Anholt2010-07-221-1/+1
* i965: Avoid extra MOV in VS indirect register reads.Eric Anholt2010-07-221-15/+16
* i965: Fix up VS temporary array access for fixed index offset != 0.Eric Anholt2010-07-221-1/+1
* i965: In the VS, multiply the address reg by the appropriate register size.Eric Anholt2010-07-211-27/+14
* i965: Clean up brw_dp_READ_4_vs() now that it has fewer options to support.Eric Anholt2010-07-213-52/+31
* i965: Support relative addressed VS constant reads using the appropriate msg.Eric Anholt2010-07-213-31/+66
* i965: Fix the DP read msg_control definitions other than plain OWORD.Eric Anholt2010-07-211-6/+16
* i965: Clean up dead code from the VS get_constant/get_reladdr_constant split.Eric Anholt2010-07-211-3/+1
* i956: Set the execution size correctly for scratch space writes.Eric Anholt2010-07-211-2/+2
* i965: Set the GEM domain flags for the scratch space.Eric Anholt2010-07-211-1/+1
* i965: Use the pretty define for 4-oword DP reads.Eric Anholt2010-07-211-1/+1
* i965: Set the send commit bit on register spills as required pre-gen6.Eric Anholt2010-07-211-9/+32
* i965: Add disasm for dataport reads (register unspilling).Eric Anholt2010-07-211-1/+22
* i965: Remove an unused variable.Carl Worth2010-07-211-1/+0
* i965: Mostly fix glsl-max-varyings.Eric Anholt2010-07-191-10/+20
* i965: Clean up message register setup in emit_vertex_write().Eric Anholt2010-07-191-7/+7
* i965: Reduce repeated calculation of the attribute-offset-in-VUE.Eric Anholt2010-07-194-24/+19
* i965: Clarify the nr_regs calculation in brw_clip.cEric Anholt2010-07-191-3/+8
* i965: Don't set up VUE space for the disabled user clip distances on gen6.Eric Anholt2010-07-192-8/+14
* i965: Add disasm for SEND mlen/rlen on Sandybridge.Eric Anholt2010-07-082-3/+4
* i965: Add 'wait' instruction supportZhenyu Wang2010-07-082-0/+30
* i965: Fix disasm of a SEND's mlen and rlen on Ironlake.Eric Anholt2010-07-081-4/+11
* i965: Add decode for Sandybridge DP write messages.Zhenyu Wang2010-07-081-9/+21
* i965: Add definitions for Sandybridge DP write/read messages.Zhenyu Wang2010-07-082-6/+53
* Merge branch 'shader-file-reorg'Brian Paul2010-06-2324-39/+38
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| * mesa: rename src/mesa/shader/ to src/mesa/program/Brian Paul2010-06-1024-39/+39
| * i965: remove UseProgram driver callbackBrian Paul2010-06-101-10/+0
* | i965: Fix the name of aa_coverage_slope in the improved AA line params.Eric Anholt2010-06-181-1/+1
* | i965: Remove unnecessary header.Vinson Lee2010-06-141-1/+0
* | i965: Fix surface state dumping with INTEL_DEBUG=batch.Eric Anholt2010-06-141-2/+2
* | i965: correct the gen6 line stipple enable define.Zhenyu Wang2010-06-141-1/+1
* | i965: Fix gen6 front cull mode.Eric Anholt2010-06-121-1/+1
* | i965: Use the new message header format for FF_SYNC on gen6.Zhenyu Wang2010-06-121-2/+7
* | i965: Add support for math instructions in the gen6 WM.Zhenyu Wang2010-06-121-0/+15
* | i965: Set the correct WM GRF start reg on gen6.Zhenyu Wang2010-06-121-1/+2
* | i965: Update gen6 paths for the streaming rework.Eric Anholt2010-06-123-31/+4