| Commit message (Expand) | Author | Age | Files | Lines |
* | i965: align the address of the first element within | Xiang, Haihao | 2007-09-14 | 1 | -0/+22 |
* | i965: translate shadow compare function into correct | Xiang, Haihao | 2007-09-12 | 3 | -2/+27 |
* | i965: revert commit 1a15b2169ba6cb100627eb525a20a00537cfb6f0, | Xiang, Haihao | 2007-09-12 | 2 | -1/+7 |
* | Fix-up #includes to remove some -I options. | Brian | 2007-09-11 | 5 | -10/+10 |
* | i965: take the secondary color into account when drawing | Xiang, Haihao | 2007-09-11 | 1 | -5/+12 |
* | i965: limit on LOD Bias, fix#11987 | Xiang, Haihao | 2007-09-11 | 1 | -1/+1 |
* | i965: only take non-varying attribute into account when | Xiang, Haihao | 2007-09-05 | 1 | -1/+1 |
* | i965: Correct build_lighting in i965 driver according to | Xiang, Haihao | 2007-09-01 | 1 | -2/+4 |
* | i965: Calculate the positional light in homogeneous coordinates. | Xiang, Haihao | 2007-08-31 | 1 | -0/+5 |
* | optimize 965 clip | Zou Nan hai | 2007-08-31 | 4 | -15/+113 |
* | i965: Take the upper limitation on LOD into account. | Xiang, Haihao | 2007-08-31 | 1 | -2/+2 |
* | Bug #10571: Fix 965 line clipping when neither vertex needs clipping. | David Moore | 2007-08-30 | 1 | -6/+14 |
* | i965: store read drawable info in intel_context. Some OpenGL | Xiang, Haihao | 2007-08-29 | 3 | -2/+8 |
* | i965: check NULL pointer. fix bug#12193 | Xiang, Haihao | 2007-08-29 | 1 | -0/+2 |
* | i965: samplers group in fours in WM_STATE. fix bug#9415 | Xiang, Haihao | 2007-08-29 | 1 | -1/+1 |
* | i965: flush batch buffer when getting the maximum. This makes | Xiang, Haihao | 2007-08-28 | 1 | -0/+6 |
* | i965: align width/height for volume texture | Xiang, Haihao | 2007-08-17 | 2 | -13/+34 |
* | i965: use BRW_TEXCOORDMODE_CLAMP instead of BRW_TEXCOORDMODE_CLAMP_BORDER | Xiang, Haihao | 2007-08-15 | 1 | -1/+1 |
* | i965: fix projtex_mask | Xiang, Haihao | 2007-08-13 | 2 | -2/+2 |
* | i965: roland's DXTn format texture patch(bug10347) | Xiang, Haihao | 2007-08-10 | 2 | -5/+19 |
* | i965/i915tex: applying right alignment to compressed texture, | Xiang, Haihao | 2007-08-10 | 1 | -3/+13 |
* | i965: set mt->cpp differently with compressed texture | Xiang, Haihao | 2007-08-10 | 2 | -4/+34 |
* | Fix typo in logic for unalias2() | Keith Whitwell | 2007-08-02 | 1 | -1/+1 |
* | fix fd.o bug #11804 | Zou Nan hai | 2007-08-02 | 3 | -0/+13 |
* | Fix previous commit | Zou Nan hai | 2007-08-02 | 1 | -1/+1 |
* | EXT_texture_sRGB support on i965 | Zou Nan hai | 2007-08-02 | 3 | -0/+25 |
* | fix fd.o bug #11788, max point size | Zou Nan hai | 2007-08-01 | 1 | -1/+1 |
* | i965: fix bad casts in do_blit_bitmap to support WindowPos correctly | Xiang, Haihao | 2007-07-31 | 1 | -4/+4 |
* | i965: Use I16_UNORM instead of L16_UNORM (bug 11742) | Xiang, Haihao | 2007-07-31 | 1 | -1/+1 |
* | ARB sprite point support on i965 | Zou Nan hai | 2007-07-30 | 4 | -4/+105 |
* | Remove ctx->Point._Size and ctx->Line._Width. | Brian | 2007-07-21 | 1 | -2/+4 |
* | fix LogicOp/bitmap problem, bug 11133 | Eric Anholt | 2007-07-04 | 3 | -5/+12 |
* | Replace texobj->Complete with texobj->_Complete since it's a derived field. | Brian | 2007-06-11 | 1 | -1/+1 |
* | i965: Add pci info for 965GME/GLE chip. | Wang Zhenyu | 2007-05-31 | 2 | -5/+9 |
* | Replace initInitState() with _mesa_init_driver_state(). | Brian | 2007-05-22 | 2 | -97/+0 |
* | include swrast_setup/swrast_setup.h to silence warning | Brian | 2007-05-22 | 1 | -0/+1 |
* | fog: fix potential issues with generated vp using fog | Roland Scheidegger | 2007-05-22 | 1 | -8/+14 |
* | add some #includes to silence warnings | Brian | 2007-05-03 | 2 | -1/+2 |
* | Merge branch 'crestline-qa', adding support for the 965GM chipset. | Eric Anholt | 2007-03-30 | 2 | -0/+4 |
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| * | Merge git://proxy01.pd.intel.com:9419/git/mesa/mesa into crestline | Nian Wu | 2007-03-26 | 1 | -1/+1 |
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| * \ | Merge git://proxy01.pd.intel.com:9419/git/mesa/mesa into crestline | Nian Wu | 2007-03-22 | 3 | -5/+5 |
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| * \ \ | Merge git://proxy01.pd.intel.com:9419/git/mesa/mesa into crestline | Nian Wu | 2007-03-21 | 1 | -9/+3 |
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| * \ \ \ | Merge git://proxy01.pd.intel.com:9419/git/mesa/mesa into crestline | Nian Wu | 2007-03-19 | 1 | -4/+11 |
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| * \ \ \ \ | Merge git://proxy01.pd.intel.com:9419/git/mesa/mesa into crestline | Nian Wu | 2007-03-14 | 1 | -15/+12 |
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| * \ \ \ \ \ | Merge git://proxy01.pd.intel.com:9419/git/mesa/mesa into crestline | Nian Wu | 2007-03-12 | 1 | -1/+8 |
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| * \ \ \ \ \ \ | Merge git://proxy01.pd.intel.com:9419/git/mesa/mesa into crestline | Nian Wu | 2007-03-07 | 1 | -2/+1 |
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| * \ \ \ \ \ \ \ | Merge git://proxy01.pd.intel.com:9419/git/mesa/mesa into crestline | Nian Wu | 2007-03-06 | 1 | -1/+2 |
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| * \ \ \ \ \ \ \ \ | Merge git://proxy01.pd.intel.com:9419/git/mesa/mesa into crestline | Nian Wu | 2007-03-06 | 1 | -0/+1 |
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| * \ \ \ \ \ \ \ \ \ | Merge git://proxy01.pd.intel.com:9419/git/mesa/mesa into crestline | Nian Wu | 2007-02-25 | 36 | -4860/+250 |
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| * | | | | | | | | | | | Add Intel 965GM chipset info | Wang Zhenyu | 2007-02-02 | 2 | -0/+4 |