summaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers/dri/i965
Commit message (Expand)AuthorAgeFilesLines
* i965: Rename various gen6 #defines to match the documentation.Kenneth Graunke2011-01-0612-33/+33
* intel: Always allocate miptrees from level 0, not tObj->BaseLevel.Eric Anholt2011-01-053-15/+10
* intel: Clarify first_level/last_level vs baselevel/maxlevel by deletion.Eric Anholt2011-01-053-6/+5
* i965: Simplify the renderbuffer setup code.Eric Anholt2011-01-051-102/+93
* i965: Add support for SRGB DXT1 formats.Eric Anholt2011-01-042-1/+5
* i965: Use last vertex convention for quad provoking vertex on sandybridgeZhenyu Wang2011-01-041-0/+7
* i965: Correct comment for gen6 fb write control message settingZhenyu Wang2011-01-041-1/+3
* i965: Fix provoking vertex select in clip state for sandybridgeZhenyu Wang2011-01-041-1/+4
* i965: Do lowering of array indexing of a vector in the FS.Eric Anholt2010-12-281-0/+1
* i965: Fix regression in FS comparisons on original gen4 due to gen6 changes.Eric Anholt2010-12-282-4/+32
* i965: Factor out the ir comparision to BRW_CONDITIONAL_* code.Eric Anholt2010-12-281-80/+34
* i965: Fix occlusion query on sandybridgeZhenyu Wang2010-12-281-0/+6
* Revert "i965: upload multisample state for fragment program change"Zhenyu Wang2010-12-283-38/+25
* i965: don't spawn GS thread for LINELOOP on SandybridgeXiang, Haihao2010-12-271-1/+4
* i965: Flatten if-statements beyond depth 16 on pre-gen6.Kenneth Graunke2010-12-271-0/+10
* i965: use align1 access mode for instructions with execSize=1 in VSXiang, Haihao2010-12-241-0/+2
* i965: fix register region descriptionXiang, Haihao2010-12-241-1/+1
* i965: Remove unnecessary headers.Vinson Lee2010-12-231-2/+0
* i965: Keep around a copy of the VS constant surface dumping code.Eric Anholt2010-12-231-0/+9
* i965: Correct the dp_read message descriptor setup on g4x.Eric Anholt2010-12-233-1/+23
* i965: upload multisample state for fragment program changeZhenyu Wang2010-12-233-25/+38
* i965: explicit tell header present for fb write on sandybridgeZhenyu Wang2010-12-224-8/+8
* i965: Avoid using float type for raw moves, to work around SNB issue.Eric Anholt2010-12-212-4/+8
* i965: Set the alternative floating point mode on gen6 VS and WM.Eric Anholt2010-12-163-0/+8
* i965: Add support for using the BLT ring on gen6.Eric Anholt2010-12-133-5/+7
* i965: Improve the hacks for ARB_fp scalar^scalar POW on gen6.Eric Anholt2010-12-131-36/+17
* i965: Fix gl_FragCoord.z setup on gen6.Eric Anholt2010-12-131-2/+7
* i956: Fix the old FP path fragment position setup on gen6.Eric Anholt2010-12-131-18/+20
* i965: Fix ARL to work on gen6.Eric Anholt2010-12-131-1/+17
* i965: Put common info on converting MESA_FORMAT to BRW_FORMAT in a table.Eric Anholt2010-12-101-126/+42
* i965: support for two-sided lighting on SandybridgeXiang, Haihao2010-12-105-6/+72
* i965: Add support for gen6 reladdr VS constant loading.Eric Anholt2010-12-092-11/+17
* i965: Add support for gen6 constant-index constant loading.Eric Anholt2010-12-092-3/+9
* intel: Set the swizzling for depth textures using the GL_RED depth mode.Eric Anholt2010-12-092-0/+8
* i965: Silence uninitialized variable warning.Vinson Lee2010-12-091-0/+5
* i965: remove unused variable since brw_wm_glsl.c removal.Eric Anholt2010-12-092-2/+1
* i965: Set render_cache_read_write surface state bit on gen6 constant surfs.Eric Anholt2010-12-092-0/+9
* i965: Set up the correct texture border color state struct for Ironlake.Eric Anholt2010-12-092-5/+45
* i965: Clean up VS constant buffer location setup.Eric Anholt2010-12-091-15/+3
* i965: Fix VS constants regression pre-gen6.Eric Anholt2010-12-091-1/+1
* i965: Drop push-mode reladdr constant loading and always use constant_map.Eric Anholt2010-12-084-93/+96
* i965: Drop KIL_NV from the ff/ARB_fp path since it was only used for GLSL.Eric Anholt2010-12-083-21/+0
* i965: Use the new pixel mask location for gen6 ARB_fp KIL instructions.Eric Anholt2010-12-081-2/+8
* i965: Set the render target index in gen6 fixed-function/ARB_fp path.Eric Anholt2010-12-081-0/+7
* i965: Set up the per-render-target blend state on gen6.Eric Anholt2010-12-081-46/+49
* i965: Set up the color masking for the first drawbuffer on gen6.Eric Anholt2010-12-081-0/+9
* i965: Don't try to store gen6 (float) blend constant color in bytes.Eric Anholt2010-12-071-1/+1
* i965: Fix flipped value of the not-embedded-in-if on gen6.Eric Anholt2010-12-071-1/+1
* i965: Work around gen6 ignoring source modifiers on math instructions.Eric Anholt2010-12-073-3/+26
* i965: Add disabled debug code for dumping out the WM constant payload.Eric Anholt2010-12-071-0/+15