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path: root/src/mesa/drivers/dri/i965
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* intel: Fix compiler warnings from winsys msaa.Eric Anholt2012-08-071-2/+0
* i965: Mark needed downsamples for msaa winsys buffersChad Versace2012-08-072-6/+16
* i965: Add function brw_blorp_blit_miptreesChad Versace2012-08-072-4/+37
* i965: Allocate dummy slots for point sprites before computing VUE map.Kenneth Graunke2012-08-061-2/+2
* i965/vs: Don't clobber sampler message MRFs with subexpressions.Kenneth Graunke2012-08-061-17/+42
* i965/fs: Don't clobber sampler message MRFs with subexpressions.Kenneth Graunke2012-08-062-70/+71
* i965/fs: Factor out texcoord setup into a helper function.Kenneth Graunke2012-08-062-11/+28
* i965/fs: Move message header and texture offset setup to generate_tex().Kenneth Graunke2012-08-063-21/+27
* mesa: Move DepthMode to texture objectPauli Nieminen2012-08-013-3/+3
* i965/msaa: Treat GL_SAMPLES=1 as equivalent to GL_SAMPLES=0.Paul Berry2012-08-0110-19/+20
* i965: Add support for GL_SKIP_DECODE_EXT on other SRGB formats.Eric Anholt2012-07-311-8/+3
* i965: Support MESA_FORMAT_SIGNED_RGBA_16.Kenneth Graunke2012-07-301-1/+1
* i965/gen7: Reduce GT1 WM thread count according to updated BSpec.Eric Anholt2012-07-271-1/+1
* i965: Fix typo in shader channel select field name.Kenneth Graunke2012-07-273-20/+20
* intel: increase wm thread number to 80 on gen6 GT2Zou Nan hai2012-07-271-5/+1
* i965/msaa: use ROUND_DOWN_TO macro.Paul Berry2012-07-261-6/+6
* i965: Use sendc for all render target writes on Gen6+.Paul Berry2012-07-261-1/+1
* i965/msaa: Remove TODO comments that are no longer relevant.Paul Berry2012-07-262-3/+2
* intel: Make more consistent use of _mesa_is_{user,winsys}_fbo()Paul Berry2012-07-261-2/+3
* i965: Remove unused param conversion code.Eric Anholt2012-07-257-80/+3
* i965/msaa: Switch on 8x MSAA for Gen7.Paul Berry2012-07-241-1/+3
* i965/msaa: Remove assertion in 3DSTATE_SAMPLE_MASK to allow 8x MSAA.Paul Berry2012-07-241-3/+0
* i965/msaa: Adjust 3DSTATE_MULTISAMPLE packet for 8x MSAA.Paul Berry2012-07-241-6/+64
* i965/blorp: Encode and decode IMS format for 8x MSAA correctly.Paul Berry2012-07-241-39/+107
* i965/blorp: Compute sample number correctly for 8x MSAA.Paul Berry2012-07-241-13/+42
* i965/blorp: Properly adjust primitive size for 8x MSAA.Paul Berry2012-07-241-4/+17
* i965/blorp: Parameterize manual_blend() by num_samples.Paul Berry2012-07-241-8/+5
* i965/msaa: Remove comment about falsely claiming to support MSAA.Paul Berry2012-07-241-5/+0
* i965/blorp: Handle DrawBuffers properly.Paul Berry2012-07-241-7/+10
* i965/blorp: Rearrange order of blit validation and preparation steps.Paul Berry2012-07-241-55/+88
* i965/blorp: Don't fall back to swrast when miptrees absent.Paul Berry2012-07-241-6/+2
* i965/blorp: Fixup scissoring of blits to window system buffers.Paul Berry2012-07-241-12/+16
* i965/blorp: Simplify check that src/dst width/height match.Paul Berry2012-07-241-4/+2
* i965/msaa: Work around problems with null render targets on Gen6.Paul Berry2012-07-242-4/+49
* i965: Set width, height, and tiling properly for null render targets.Paul Berry2012-07-242-2/+60
* i965/msaa: Control multisampling behaviour via the visual.Paul Berry2012-07-245-17/+7
* i965/gen7: Increase the WM threads to hardware limits.Eric Anholt2012-07-201-1/+1
* i965/blorp: Use IMS layout when texturing from depth/stencil surfaces.Paul Berry2012-07-201-23/+43
* i965/blorp: Loosen assertions in compute_msaa_layout_for_pipeline.Paul Berry2012-07-201-7/+2
* i965/blorp: Configure SURFACE_STATE correctly for IMS surfaces.Paul Berry2012-07-203-6/+14
* i965/blorp: Optimize manual_blend() for compressed multisampled surfaces.Paul Berry2012-07-201-0/+23
* i965/blorp: Fix integer downsampling on Gen7.Paul Berry2012-07-202-11/+55
* i965/blorp: Modify manual_blend() to avoid unnecessary loss of precision.Paul Berry2012-07-201-27/+90
* i965: Add support for AVG instruction.Paul Berry2012-07-202-0/+23
* i965: Replace fs_visitor::kill_emitted with gl_fragment_program::UsesKill.Paul Berry2012-07-202-4/+1
* mesa: Set gl_fragment_program::UsesKill in do_set_program_inouts.Paul Berry2012-07-201-25/+0
* i965: Avoid unnecessary recompiles for shaders that don't use dFdy().Paul Berry2012-07-194-14/+10
* i965/fs: Make register spill/unspill only do the regs for that instruction.Eric Anholt2012-07-181-33/+33
* i965/fs.h: Refactor tests for instructions modifying a register.Eric Anholt2012-07-184-34/+16
* i965/fs: Replace usage is_tex() with regs_written() checks.Eric Anholt2012-07-181-9/+9