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path: root/src/mesa/drivers/dri/i965
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* i965: Fix massive memory allocation for streaming texture usage.Eric Anholt2009-09-302-0/+50
* i965: Clean up some mess with the batch cache.Eric Anholt2009-09-243-18/+5
* i965: Emit zero initialization for NV VP temporaries as required.Eric Anholt2009-09-241-0/+1
* i965: Remove assert about NV_vp now that it somewhat works.Eric Anholt2009-09-241-2/+0
* i965: Load NV program matrices when required.Eric Anholt2009-09-241-0/+3
* i965: Fix relocation delta for WM surfaces.Eric Anholt2009-09-101-1/+1
* Merge branch 'mesa_7_5_branch' into mesa_7_6_branchBrian Paul2009-09-093-1/+4
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| * i965: fix incorrect test for vertex position attributeBrian Paul2009-09-083-1/+4
| * intel: Also get the DRI2 front buffer when doing front buffer reading.Eric Anholt2009-09-041-0/+1
| * intel: Update Mesa state before span setup in glReadPixels.Eric Anholt2009-09-041-0/+1
| * i965: Add missing state dependency of sf_unit on _NEW_BUFFERS.Eric Anholt2009-09-041-2/+4
| * intel: Align cubemap texture height to its padding requirements.Eric Anholt2009-09-041-0/+10
| * i965: Fix source depth reg setting for FSes reading and writing to depth.Eric Anholt2009-09-043-1/+5
| * i965: Respect CondSwizzle in OPCODE_IF.Eric Anholt2009-09-041-1/+21
| * i965: asst clean-ups, etc in brw_vs_emit()Brian Paul2009-09-041-11/+10
| * i965: Emit conditional code updates as required for GLSL VS if statements.Eric Anholt2009-09-041-0/+13
| * i965: Spell "conditional" correctly.Eric Anholt2009-09-043-15/+15
| * i965: Fix RECT shadow sampling by not losing the other texcoords.Eric Anholt2009-09-041-1/+5
| * i965: Assert that the offset in the VBO is below the VBO size.Eric Anholt2009-09-041-0/+14
| * i965: Even if no VS inputs are set, still load some amount of URB as required.Eric Anholt2009-09-041-0/+11
| * i965: Make sure the VS URB size is big enough to fit a VF VUE.Eric Anholt2009-09-041-1/+8
| * i965: Don't emit bad packets when no VBs are referenced.Eric Anholt2009-09-041-0/+22
| * i965: Calculate enabled[] and nr_enabled once and re-use the values.Eric Anholt2009-09-042-29/+18
| * i965: Set the max index buffer address correctly according to the docs.Eric Anholt2009-09-041-1/+1
| * i965: rename var: s/tmp/vs_inputs/Brian Paul2009-09-041-8/+8
| * i965: Don't clip everything if FRONT_AND_BACK culling while culling disabled.Eric Anholt2009-07-201-1/+2
| * i965: fix fetching constants from constant buffer in glsl pathRoland Scheidegger2009-07-044-17/+16
| * i965: Remove bad constant buffer constant-reg-already-loaded optimization.Eric Anholt2009-07-041-13/+11
| * i965: handle OPCODE_SWZ in the glsl pathRoland Scheidegger2009-06-221-0/+1
| * i965: fix 1D texture borders with GL_CLAMP_TO_BORDERRobert Ellison2009-06-171-0/+10
| * i965: fix segfault on low memory conditionsRobert Ellison2009-06-171-0/+7
| * i956: Make state dependency of SF on drawbuffer bounds match Mesa's.Eric Anholt2009-06-171-2/+5
| * i965: Fix varying payload reg assignment for the non-GLSL-instructions path.Eric Anholt2009-06-171-8/+10
| * i965: Fix register allocation of GLSL fp inputs.Eric Anholt2009-06-174-13/+27
* | intel: Add support for ARB_sync.Eric Anholt2009-09-032-0/+2
* | Revert "i965: Use VBOs in the VBO module on 965, now that we have ARB_map_buf...Eric Anholt2009-09-021-2/+0
* | i965: CS FENCE in URB_FENCE is 11-bits wideXiang, Haihao2009-09-021-2/+2
* | i965: validate sf stateXiang, Haihao2009-09-021-0/+1
* | i965: Fix segfault with ARB_oq CheckQuery when results are already fetched.Eric Anholt2009-08-291-1/+1
* | i965: Support PROGRAM_ENV_PARAMs in brw_vs_emit.cEric Anholt2009-08-292-1/+4
* | i965: Use VBOs in the VBO module on 965, now that we have ARB_map_buffer_range.Eric Anholt2009-08-281-0/+2
* | i965: Implement ARB_oq CheckQuery in the intended way.Eric Anholt2009-08-281-6/+1
* | i965: Increase assmebly shader program parameter limitsIan Romanick2009-08-261-2/+2
* | ARB prog: Change handling of program parameter limitsIan Romanick2009-08-261-1/+26
* | i965: init the tex_units_used fieldBrian Paul2009-08-261-0/+1
* | i965: fix incorrect tex unit in emit_tex() and emit_txb()Brian Paul2009-08-261-2/+4
* | i965: clean-up tex target switchesBrian Paul2009-08-261-2/+10
* | i965: added texture unit sanity checkBrian Paul2009-08-261-0/+13
* | i965: keep track of which texture units the fragment shader accessesBrian Paul2009-08-262-3/+18
* | i965: clean up texture target switchesBrian Paul2009-08-261-2/+10
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