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* i965: Mark shader programs for capture in the error state.Matt Turner2017-05-151-0/+7
| | | | | | | | | | | | | When the GPU hangs, the kernel saves some state for us. Until now it has not included the shader programs, which are very often the reason the GPU hang occurred. With the programs saved in the error state, we should be more capable of debugging hangs. Thanks to Chris Wilson and Ben Widawsky who provided the kernel support for this feature ("drm/i915: Copy user requested buffers into the error state"), which will be in kernel v4.13. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/drm: Rename drm_bacon_bufmgr to struct brw_bufmgr.Kenneth Graunke2017-04-101-1/+1
| | | | | | Also stop using typedefs, per Mesa coding style. Acked-by: Jason Ekstrand <[email protected]>
* i965: Make a screen::aperture_threshold field.Kenneth Graunke2017-04-101-0/+3
| | | | | | | | | | | | This is the threshold after which drm_intel_bufmgr_check_aperture_space returns -ENOSPC, signalling that it thinks an execbuf is likely to fail and we need to roll back and flush the batch. We'll need this when we rewrite aperture space checking, shortly. In the meantime, we can also use it in GLX_MESA_query_renderer. Reviewed-by: Chris Wilson <[email protected]> Acked-by: Jason Ekstrand <[email protected]>
* i965/drm: Use our internal libdrm (drm_bacon) rather than the real one.Kenneth Graunke2017-04-101-2/+2
| | | | | | Now we can actually test our changes. Acked-by: Jason Ekstrand <[email protected]>
* i965: Stop using legacy dri_bufmgr_* and intel_* names.Kenneth Graunke2017-03-301-1/+1
| | | | | | | | Eric renamed these from dri_bufmgr_* and intel_bufmgr_* to drm_intel_* in libdrm commit 4b9826408f65976a1a13387beda748b65e03ec52, circa 2008, but we've been using the legacy names this whole time. Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Remove use of deprecated drm_intel_aub routinesChris Wilson2017-03-071-1/+0
| | | | | | | | | | | | | | With mesa/drm commit cd2f91e18db087edf93fed828e568ee53b887860 Author: Kristian Høgsberg Kristensen <[email protected]> Date: Fri Jul 31 10:47:50 2015 -0700 intel: Drop aub dumping functionality the drm_intel_aub routines are mere stubs and do nothing. Likewise remove our invocations. Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Delete vestiges of resource streamer code.Kenneth Graunke2017-03-061-5/+0
| | | | | | | | | | | | | We never actually used the resource streamer in any shipping build of Mesa. We have no plans to do so in the future. We looked into using it in Vulkan, and concluded that it was unusable. We're not the only ones to arrive at the conclusion that it's not worth using. So, drop the last vestiges of resource streamer support and move on. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* i965: add extern C notation in headersEmil Velikov2017-02-211-0/+8
| | | | | | | | | | | Otherwise symbols wont be annotated with C linkage and we'll fail at link time. Currently this is worked around by wrapping the header inclusion itself. The latter in itself fragile and not recommended. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* i965: Add intel_screen::has_fence_fdChad Versace2017-01-271-1/+1
| | | | | | | | This bool maps to I915_PARAM_HAS_EXEC_FENCE_FD. Reviewed-by: Rafael Antognolli <[email protected]> Tested-by: Rafael Antognolli <[email protected]> Acked-by: Kenneth Graunke <[email protected]>
* i965: add a kernel_features bitfield to intel screenIago Toral Quiroga2017-01-051-12/+33
| | | | | | | | | | | We can use this to track various features that may or may not be supported by the hw / kernel. Currently, we usually do this by checking the generation and supported command parser versions in various places thoughtout the driver code. With this patch, we centralize all these checks in just once place at screen creation time, then we just query the bitfield wherever we need to check if a particular feature is supported. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: get rid of brw->can_do_pipelined_register_writesIago Toral Quiroga2017-01-051-0/+6
| | | | | | Instead, check the screen field directly. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Move the pipelined test for SO register access to the screenChris Wilson2017-01-051-0/+8
| | | | | | | | | | | | Moving the test to the screen places it alongside the other global HW feature tests that want to be shared between contexts. Also, we need to know if we support pipelined register writes at screen creation time so that we can tell if we can expose OpenGL 4.0 in gen7. Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* intel/i965: make gen_device_info mutableLionel Landwerlin2016-09-231-1/+1
| | | | | | | | | | | | Make gen_device_info a mutable structure so we can update the fields that can be refined by querying the kernel (like subslices and EU numbers). This patch does not make any functional change, it just makes gen_get_device_info() fill a structure rather than returning a const pointer. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* intel: s/brw_device_info/gen_device_info/Jason Ekstrand2016-09-031-2/+2
| | | | | | | | | | | | | Generated by: sed -i -e 's/brw_device_info/gen_device_info/g' src/intel/**/*.c sed -i -e 's/brw_device_info/gen_device_info/g' src/intel/**/*.h sed -i -e 's/brw_device_info/gen_device_info/g' **/i965/*.c sed -i -e 's/brw_device_info/gen_device_info/g' **/i965/*.cpp sed -i -e 's/brw_device_info/gen_device_info/g' **/i965/*.h Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* intel: Add a new "common" library for more code sharingJason Ekstrand2016-09-031-1/+1
| | | | | | | The first thing to go in this new library is brw_device_info. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965: Embrace "unlimited" GTT mmap supportChris Wilson2016-08-261-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | From about kernel 4.9, GTT mmaps are virtually unlimited. A new parameter, I915_PARAM_MMAP_GTT_VERSION, is added to advertise the feature so query it and use it to avoid limiting tiled allocations to only fit within the mappable aperture. A couple of caveats: - fence support is still limited by stride to 262144 and the stride needs to be a multiple of tile_width (as before, and same limitation as the current 3D pipeline in hardware) - the max_gtt_map_object_size forcing untiled may be hiding a few bugs in handling of large objects, though none were spotted in piglits. See kernel commit 4cc6907501ed ("drm/i915: Add I915_PARAM_MMAP_GTT_VERSION to advertise unlimited mmaps"). v2: Include some commentary on mmap virtual space vs CPU addressable space. Signed-off-by: Chris Wilson <[email protected]> Cc: Kenneth Graunke <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Daniel Vetter <[email protected]>
* i965: Only enable ARB_query_buffer_object for newer kernels on Haswell.Kenneth Graunke2016-05-091-0/+6
| | | | | | | | | | | | | | On Haswell, we need version 6 of the kernel command parser in order to write the math registers. Our implementation of ARB_query_buffer_object heavily relies on MI_MATH, so we should only advertise it when MI_MATH is available. We also need MI_LOAD_REGISTER_REG, which requires version 7 of the command parser. To make these checks easier, introduce a screen->has_mi_math_and_lrr flag that will be set when both commands are supported. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965: Query and store GPU properties from kernelBen Widawsky2016-03-111-1/+11
| | | | | | | | | | | | | | | | | Certain products are not uniquely identifiable based on device id alone. The kernel exports an interface to help deal with this. This patch merely introduces the consumer of the interface and makes sure nothing breaks. It is also possible to use these values for programming GPGPU mode, and I plan to do that as well. The interface was introduced in libdrm 2.4.60, which is already required, so it should all be fine. v2: Some minor changes recommended by Matt Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965: Remove unused hw_must_use_separate_stencilBen Widawsky2016-01-131-2/+0
| | | | | | | | | | I spotted this while looking for what needs updating in future platforms. I'm too lazy to go through the git logs, but it was probably missed by Jason when all the brw refactoring happened. Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Fix typos in licenseIan Romanick2015-09-101-2/+2
| | | | | | | | | | | | | | | | grep -lr 'sub license' | while read f; do \ sed --in-place -e 's/sub license/sublicense/' $f ;\ done grep -lr 'NON-INFRINGEMENT' | while read f; do \ sed --in-place -e 's/NON-INFRINGEMENT/NONINFRINGEMENT/' $f ;\ done As noted by Matt, both of these changes match the MIT license text found at http://opensource.org/licenses/MIT. Signed-off-by: Ian Romanick <[email protected]> Acked-by: Matt Turner <[email protected]>
* i965: Remove horizontal bars from file header commentsIan Romanick2015-09-101-4/+2
| | | | | | | Why was that ever a thing? Signed-off-by: Ian Romanick <[email protected]> Acked-by: Matt Turner <[email protected]>
* i965: Use updated kernel interface for accurate TIMESTAMP readsChris Wilson2015-07-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | I was mistaken, I thought we already had fixed this in the kernel a couple of years ago. We had not, and the broken read (the hardware shifts the register output on 64bit kernels, but not on 32bit kernels) is now enshrined into the ABI. I also had the buggy architecture reversed, believing it to be 32bit that had the shifted results. On the basis of those mistakes, I wrote commit c8d3ebaffc0d7d915c1c19d54dba61fd1e57b338 Author: Chris Wilson <[email protected]> Date: Wed Apr 29 13:32:38 2015 +0100 i965: Query whether we have kernel support for the TIMESTAMP register once Now that we do have an extended register read interface for always reporting the full 36bit TIMESTAMP (irrespective of whether the hardware is buggy or not), make use of it and in the process fix my reversed detection of the buggy reads for unpatched kernels. Signed-off-by: Chris Wilson <[email protected]> Cc: Martin Peres <[email protected]> Cc: Kenneth Graunke <[email protected]> Cc: Michał Winiarski <[email protected]> Cc: Daniel Vetter <[email protected]> Tested-and-acked-by: Chris Forbes <[email protected]> Reviewed-by: Daniel Vetter <[email protected]>
* i965: Enable resource streamer for the batchbufferAbdiel Janulgue2015-07-181-0/+5
| | | | | | | | | | | | | | | | | | | | | Check first if the hardware and kernel supports resource streamer. If this is allowed, tell the kernel to enable the resource streamer enable bit on MI_BATCHBUFFER_START by specifying I915_EXEC_RESOURCE_STREAMER execbuffer flags. v2: - Use new I915_PARAM_HAS_RESOURCE_STREAMER ioctl to check if kernel supports RS (Ken). - Add brw_device_info::has_resource_streamer and toggle it for Haswell, Broadwell, Cherryview, Skylake, and Broxton (Ken). v3: - Update I915_PARAM_HAS_RESOURCE_STREAMER to match updated kernel. v4: - Always inspect the getparam.value (Chris Wilson). v5: - Fold redundant devinfo->has_resource_streamer check in context create into init screen. Cc: [email protected] Cc: [email protected] Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Abdiel Janulgue <[email protected]>
* i965: Query whether we have kernel support for the TIMESTAMP register onceChris Wilson2015-07-081-0/+2
| | | | | | | | | | | | | | | | Move the query for the TIMESTAMP register from context init to the screen, so that it is only queried once for all contexts. On 32bit systems, some old kernels trigger a hw bug resulting in the TIMESTAMP register being shifted and the low 32bits always zero. Detect this by repeating the read a few times and check the register is incrementing every 80ns as expected and not stuck on zero (as would be the case with the buggy kernel/hw.). Signed-off-by: Chris Wilson <[email protected]> Cc: Martin Peres <[email protected]> Reviewed-by: Martin Peres <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Store the command parser version number in intel_screenNeil Roberts2015-05-121-1/+7
| | | | | | | | | In order to detect whether the predicate source registers can be used in a later patch we will need to know the version number for the command parser. This patch just adds a member to intel_screen and does an ioctl to get the version. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/sync: Implement DRI2_Fence extensionChad Versace2015-05-071-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This enables EGL_KHR_fence_sync and EGL_KHR_wait_sync. Below is the difference in piglit results, before and after this patch. No regressions and several tests improve from 'skip' to 'pass'. Out of EGL_KHR_fence_sync tests, two of the multithreaded tests skip; all other tests pass. cmdline: piglit run -p gbm -t sync tests/quick.py mesa: master@1ac7db0 piglit: 4069bec hw: Ivybridge | before after ------+------------- pass | 32 46 fail | 0 0 crash | 0 0 skip | 35 21 total | 67 67 v2: - Set fence->signalled = true in brw_fence_has_completed() too. Reviewed-by: Daniel Stone <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Add a brw_compiler structure and store the register sets in itJason Ekstrand2015-04-221-47/+1
| | | | Reviewed-by: Matt Turner <[email protected]>
* i965/fs: Use the GRF for FB writes on gen >= 7Jason Ekstrand2014-09-301-0/+10
| | | | | | | | | | | | | | | On gen 7, the MRF was removed and we gained the ability to do send instructions directly from the GRF. This commit enables that functinoality for FB writes. v2: Make handling of components more sane. i965/fs: Force a high register for the final FB write v2: Renamed the array for the range mappings and added a comment Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Delete intel_chipset.h.Kenneth Graunke2014-09-291-1/+0
| | | | | | Unused; it was replaced by include/pci_ids/i965_pci_ids.h long ago. Acked-by: Matt Turner <[email protected]>
* i965: Add an env var for forcing window system MSAA.Eric Anholt2014-03-241-0/+2
| | | | | | | | Sometimes it would be nice to benchmark some app with MSAA versus not, but it doesn't offer the controls you want. Just provide a handy knob to force the issue. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Allocate register sets at screen creation, not context creation.Kenneth Graunke2014-03-181-0/+38
| | | | | | | | | | | | | | Register sets depend on the particular hardware generation, but don't depend on anything in the actual OpenGL context. Computing them is fairly expensive, and they take up a large amount of memory. Putting them in the screen allows us to compute/allocate them once for all contexts, saving both time and space. Improves the performance of a context creation/destruction microbenchmark by about 3x on my Haswell i7-4750HQ. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* s/Tungsten Graphics/VMware/José Fonseca2014-01-171-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tungsten Graphics Inc. was acquired by VMware Inc. in 2008. Leaving the old copyright name is creating unnecessary confusion, hence this change. This was the sed script I used: $ cat tg2vmw.sed # Run as: # # git reset --hard HEAD && find include scons src -type f -not -name 'sed*' -print0 | xargs -0 sed -i -f tg2vmw.sed # # Rename copyrights s/Tungsten Gra\(ph\|hp\)ics,\? [iI]nc\.\?\(, Cedar Park\)\?\(, Austin\)\?\(, \(Texas\|TX\)\)\?\.\?/VMware, Inc./g /Copyright/s/Tungsten Graphics\(,\? [iI]nc\.\)\?\(, Cedar Park\)\?\(, Austin\)\?\(, \(Texas\|TX\)\)\?\.\?/VMware, Inc./ s/TUNGSTEN GRAPHICS/VMWARE/g # Rename emails s/[email protected]/[email protected]/ s/[email protected]/[email protected]/g s/jrfonseca-at-tungstengraphics-dot-com/jfonseca-at-vmware-dot-com/ s/jrfonseca\[email protected]/[email protected]/g s/keithw\[email protected]/[email protected]/g s/[email protected]/[email protected]/g s/thomas-at-tungstengraphics-dot-com/thellstom-at-vmware-dot-com/ s/[email protected]/[email protected]/ # Remove dead links s@Tungsten Graphics (http://www.tungstengraphics.com)@Tungsten Graphics@g # C string src/gallium/state_trackers/vega/api_misc.c s/"Tungsten Graphics, Inc"/"VMware, Inc"/ Reviewed-by: Brian Paul <[email protected]>
* i965: Drop trailing whitespace from the rest of the driver.Kenneth Graunke2013-12-051-5/+5
| | | | | | | Performed via: $ for file in *; do sed -i 's/ *//g'; done Signed-off-by: Kenneth Graunke <[email protected]>
* i965: Properly reject __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS when ↵Ian Romanick2013-11-271-0/+5
| | | | | | | | | | | | | | | | | | | __DRI2_ROBUSTNESS is not enabled Only allow __DRI_CTX_FLAG_ROBUST_BUFFER_ACCESS in brwCreateContext if intelInitScreen2 also enabled __DRI2_ROBUSTNESS (thereby enabling GLX_ARB_create_context). This fixes a regression in the piglit test "glx/GLX_ARB_create_context/invalid flag" v2: Remove commented debug code. Noticed by Jordan. Signed-off-by: Ian Romanick <[email protected]> Reported-by: Paul Berry <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Matt Turner <[email protected]> Cc: "10.0" <[email protected]>
* i965: Share code between intel_quantize_num_samples and clamp_max_samplesChad Versace2013-11-221-0/+3
| | | | | | | | | | | | | | | | | | clamp_max_samples() and intel_quantize_num_samples() each maintained their own list of which MSAA modes the hardware supports. This patch removes the duplication by making intel_quantize_num_samples() use the same list as clamp_max_samples(), the list maintained in brw_supported_msaa_modes(). By removing the duplication, we prevent the scenario where someone updates one list but forgets to update the other. Move function `brw_context.c:static brw_supported_msaa_modes()` to `intel_screen.c:(non-static) intel_supported_msaa_modes()` and patch intel_quantize_num_samples() to use the list returned by that function. Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* i965: Build the driver into a shared mesa_dri_drivers.so .Eric Anholt2013-10-241-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Previously, we've split things such that mesa core is in libdricore, exposing the whole Mesa core interface in the global namespace, and the i965_dri.so code all links against that. Along with polluting application namespace terribly, it requires extra PLT indirections and prevents LTO. Instead, we can build all of the driver contents into the same .so with just a few symbols exposed to be referenced from the actual driver .so file, allowing LTO and reducing our exposed symbol count massively. FPS improvement on GLB2.7 with INTEL_NO_HW=1: 2.61061% +/- 1.16957% (n=50) (without LTO, just the PLT reductions from this commit) Note that the X Server requires commit 7ecfab47eb221dbb996ea6c033348b8eceaeb893 to successfully load this driver! v2: Set a global driverAPI variable so loaders don't have to update to createNewScreen2() (though they may want to for thread safety). v3: Drop AM_CPPFLAGS addition (Emil pointed out I'd missed some cflags that would be necessary, though only if we actually relied on them). v4: Fix install with DESTDIR set. Reviewed-by: Matt Turner <[email protected]> (v1) Reviewed-by: Emil Velikov <[email protected]> (v2)
* i965: Replace some intel_screen fields with brw_device_info references.Kenneth Graunke2013-10-131-9/+0
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Add a new brw_device_info structure.Kenneth Graunke2013-10-131-0/+4
| | | | | | | | | | | | | | | The idea is that struct brw_device_info should store statically-known information about hardware features. Using the new family name in the PCI ID table, we can easily grab the right structure. This is basically the equivalent of intel_device_info in the kernel. This patch also makes the new structure available from intel_screen, but nothing uses it. Right now, it looks very redundant with existing fields, but that will change. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* dri: Move API version validation into dri/common.Eric Anholt2013-10-101-5/+0
| | | | | | | | | | | | | | | | | i965, i915, radeon, r200, swrast, and nouveau were mostly trying to do the same logic, except where they failed to. Notably, swrast had code that appeared to try to enable GLES1/2 but forgot to set api_mask (thus preventing any gles context from being created), and the non-intel drivers didn't support MESA_GL_VERSION_OVERRIDE. nouveau still relies on _mesa_compute_version(), because I don't know what its limits actually are, and gallium drivers don't declare limits up front at all. I think I've heard talk about doing so, though. v2: Compat max version should be 30 (noted by Ken) Drop r100's custom max version check, too (noted by Emil Velikov) Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Delete intel_context entirely.Kenneth Graunke2013-07-091-1/+1
| | | | | | | | | | This makes brw_context inherit directly from gl_context; that was the only thing left in intel_context. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Drop i915 code from intel_screen.Eric Anholt2013-06-281-1/+0
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Move the remaining intel code to the i965 directory.Eric Anholt2013-06-261-0/+89
| | | | | | | | | Now that i915's forked off, they don't need to live in a shared directory. Acked-by: Kenneth Graunke <[email protected]> Acked-by: Chad Versace <[email protected]> Acked-by: Adam Jackson <[email protected]> (and I hear second hand that idr is OK with it, too)
* [965] Enable EXT_framebuffer_object.Eric Anholt2007-12-201-116/+0
| | | | | To do so, merge the remainnig necessary code from the buffers, blit, span, and screen code to shared, and replace it with those.
* [intel] Move bufmgr back to context instead of screen, fixing glthreads.Eric Anholt2007-12-121-18/+0
| | | | | | | | Putting the bufmgr in the screen is not thread-safe since the emit_reloc changes. It also led to a significant performance hit from pthread usage for the attempted thread-safety (up to 12% of a cpu spent on refcounting protection in single-threaded 965). The motivation had been to allow multi-context bufmgr sharing in classic mode, but it wasn't worth the cost.
* [965] Convert the driver to dri_bufmgr interface and enable TTM.Eric Anholt2007-12-071-1/+21
| | | | | | | | | | | | | This is currently believed to work but be a significant performance loss. Performance recovery should be soon to follow. The dri_bo_fake_disable_backing_store() call was added to allow backing store disable like bufmgr_fake.c did, which is a significant performance win (though it's missing the no-fence-subdata part). This commit is a squash merge of the 965-ttm branch, which had some history I wanted to avoid pulling due to noisiness and brokenness at many points for git-bisecting.
* Use the tiled flag in the sarea to determine region tiling.Haihao Xiang2006-12-301-0/+1
| | | | | | This fixes mis-rendering if back/depth fail to get set up as tiled. While it probably won't ever be the case now that the pitch limits are loosened, this is still the right thing to do.
* Add Intel i965G/Q DRI driver.Eric Anholt2006-08-091-0/+113
This driver comes from Tungsten Graphics, with a few further modifications by Intel.
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