aboutsummaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
Commit message (Expand)AuthorAgeFilesLines
* i965/miptree: Rename align_w,align_h -> halign,valignChad Versace2015-09-301-1/+1
* i965/miptree: Rename intel_miptree_map::mt -> ::linear_mt (v2)Chad Versace2015-09-301-14/+16
* i965: Rename intel_miptree_get_dimensions_for_image()Anuj Phogat2015-09-281-3/+9
* i965: Use intel_get_tile_dims() to get tile masksAnuj Phogat2015-09-281-22/+9
* i965: Add a helper function intel_get_tile_dims()Anuj Phogat2015-09-281-22/+60
* i915, i965: Silence unused parameter warnings in intel_miptree_unmap_gttIan Romanick2015-09-101-6/+2
* i965: Make intel_miptree_map_raw staticIan Romanick2015-09-101-13/+17
* i965: Silence unused parameter warnings in intel_mipmap_tree.cIan Romanick2015-09-101-5/+4
* i965: Fix typos in licenseIan Romanick2015-09-101-2/+2
* i965: Remove horizontal bars from file header commentsIan Romanick2015-09-101-4/+2
* i965: Resolve GCC sign-compare warning.Rhys Kidd2015-09-101-4/+4
* i965/skl: Use more compact hiz dimensionsBen Widawsky2015-09-081-32/+32
* i965: change the meaning of cpp for compressed texturesNanley Chery2015-08-261-10/+4
* i965: use ALIGN_NPOT for setting ASTC mipmap layoutsNanley Chery2015-08-261-2/+2
* i965: Rename MIPTREE_LAYOUT_ALLOC_* -> MIPTREE_LAYOUT_TILING_*.Matt Turner2015-08-061-8/+8
* i965: Request a miptree with no tiling intel_miptree_map_blit().Matt Turner2015-08-061-1/+1
* mesa: Rename _mesa_lookup_enum_by_nr() to _mesa_enum_to_string().Kenneth Graunke2015-07-201-1/+1
* i965: Push miptree tiling request into flagsBen Widawsky2015-07-161-22/+24
* Revert "i965: Push miptree tiling request into flags"Ben Widawsky2015-07-161-24/+22
* i965: Push miptree tiling request into flagsBen Widawsky2015-07-161-22/+24
* i965: Fix 32 bit build warnings in intel_get_yf_ys_bo_size()Anuj Phogat2015-07-151-3/+3
* i965/gen9: Allocate YF/YS tiled buffer objectsAnuj Phogat2015-06-291-3/+62
* i965/skl: Use more compact hiz dimensionsBen Widawsky2015-06-251-15/+17
* i965/gen8: Use HALIGN_16 for single sample mcs buffersBen Widawsky2015-06-191-1/+1
* i965: Fix aligning to the block size in intel_miptree_copy_sliceNeil Roberts2015-06-161-2/+4
* i965: Check for miptree pitch alignment before using intel_miptree_map_movntd...Anuj Phogat2015-06-151-1/+3
* i965/gen9: Set HALIGN_16 for all aux buffersBen Widawsky2015-06-121-3/+19
* i965/gen8: Correct HALIGN for AUX surfacesBen Widawsky2015-06-121-2/+13
* i965: Extract tiling from fast clear decisionBen Widawsky2015-06-121-11/+25
* i965/gen9: Only allow Y-Tiled MCS buffersBen Widawsky2015-06-121-0/+2
* i965: Consolidate certain miptree params to flagsBen Widawsky2015-06-121-47/+49
* i965: Move intel_miptree_choose_tiling() to brw_tex_layout.cAnuj Phogat2015-06-081-104/+0
* i965: Choose tiling in brw_miptree_layout() functionAnuj Phogat2015-06-081-23/+24
* i965: Add gen8 fast clear perf debugBen Widawsky2015-06-051-2/+15
* i965/skl: Don't use ALL_SLICES_AT_EACH_LODNeil Roberts2015-04-201-10/+20
* i965: replace __FUNCTION__ with __func__Marius Predut2015-04-141-15/+15
* i965: Don't bother freeing NULL.Matt Turner2015-04-131-4/+2
* i965: Change intel_miptree_create_for_bo() signatureChad Versace2015-04-131-6/+11
* i965: Add field intel_mipmap_tree::disable_aux_buffersChad Versace2015-04-131-2/+22
* i965: Refactor brw_is_hiz_depth_format()Chad Versace2015-04-131-2/+24
* i965: Declare intel_miptree_create_layout() as staticChad Versace2015-04-131-1/+1
* i965: Declare intel_miptree_alloc_mcs() as staticChad Versace2015-04-131-1/+6
* i965/gen8: Don't allocate hiz miptree structureJordan Justen2015-03-091-0/+105
* i965/gen7: Don't allocate hiz miptree structureJordan Justen2015-03-091-2/+104
* i965/hiz: Start to separate miptree out from hiz buffersJordan Justen2015-03-091-17/+42
* i965: Make a function to check the conditions to use the blitterAnuj Phogat2015-02-251-11/+29
* i965: Move the comment to the right placeAnuj Phogat2015-02-251-1/+1
* i965: Fix condition to use Y tiling in blitter in intel_miptree_create()Anuj Phogat2015-02-251-3/+3
* i965: Don't force x-tiling for 16-bpp formats on Gen>7Neil Roberts2015-02-251-3/+3
* i965: Don't tile 1D miptrees.Francisco Jerez2015-02-101-0/+7