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path: root/src/mesa/drivers/dri/i965/intel_blit.c
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* i965: Optimize batchbuffer macros.Matt Turner2015-07-151-9/+10
* i965/skl: Extract the blit command setup in to a helperAnuj Phogat2015-06-291-32/+61
* i965/gen9: Add XY_FAST_COPY_BLT support to intelEmitCopyBlit()Anuj Phogat2015-06-291-50/+254
* i965: Rename intel_emit* to reflect their new location in brw_pipe_controlChris Wilson2015-06-241-3/+3
* i965: Remove break after returnAnuj Phogat2015-06-151-3/+0
* i965: Export format comparison for blitting between miptreesChris Wilson2015-06-081-3/+3
* i915: Blit RGBX<->RGBA drawpixelsChris Wilson2015-06-081-7/+29
* i965: Fix HW blitter pitch limitsChris Wilson2015-06-081-5/+14
* i965: Disallow linear blits that are not cacheline aligned.Kenneth Graunke2015-04-231-8/+19
* i965: Make intel_emit_linear_blit handle Gen8+ alignment restrictions.Kenneth Graunke2015-04-231-8/+14
* i965: replace __FUNCTION__ with __func__Marius Predut2015-04-141-4/+4
* i965: Add more stringent blitter assertionsBen Widawsky2015-02-071-0/+3
* i965: Consolidate some of the intel_blit logicBen Widawsky2015-02-071-20/+8
* i965: Require pixel alignment for GPU copy blitCody Northrop2014-12-161-2/+3
* i965/gen8: Check correct number of blitter dwordsBen Widawsky2014-12-111-6/+6
* i965: Use unreachable() instead of unconditional assert().Matt Turner2014-07-011-2/+1
* i965: Delete the intel_regions.c code.Eric Anholt2014-05-011-1/+0
* i965: Drop use of intel_region from miptrees.Eric Anholt2014-05-011-18/+17
* i965: Fix the region's pitch condition to use blitterAnuj Phogat2014-02-261-3/+3
* i965: Don't forget to subtract mt->first_level in minify calls.Kenneth Graunke2014-02-261-2/+2
* i965: Don't try to use the hardware blitter for multisampled miptrees.Kenneth Graunke2014-02-231-0/+4
* i965: Drop mt->levels[].width/height.Eric Anholt2014-02-181-2/+2
* mesa: Rename 4 color component unsigned byte MESA_FORMATsMark Mueller2014-01-271-6/+6
* mesa: change gl_format to mesa_formatMark Mueller2014-01-271-2/+2
* i965: Update blitter code for 48-bit addresses.Kenneth Graunke2014-01-201-16/+48
* s/Tungsten Graphics/VMware/José Fonseca2014-01-171-2/+2
* i965: Use SET_FIELD to safety check our x/y offsets in blits.Eric Anholt2014-01-091-7/+8
* i965: Add a safety check for emitting blits.Eric Anholt2014-01-091-0/+4
* i965: Don't call the blitter on addresses it can't handle.Eric Anholt2014-01-091-0/+20
* i965: Replace OUT_RELOC_FENCED with OUT_RELOC.Kenneth Graunke2013-12-091-12/+10
* i965: Drop trailing whitespace from the rest of the driver.Kenneth Graunke2013-12-051-5/+5
* i965: Convert brw->batch.is_blit to a BLT_RING/RENDER_RING enum.Kenneth Graunke2013-11-211-3/+3
* i965: Fix logic_op check.Vinson Lee2013-11-031-2/+1
* i965: Delete the BATCH_LOCALS macro.Kenneth Graunke2013-08-011-2/+0
* i965: Delete intel_context entirely.Kenneth Graunke2013-07-091-2/+1
* i965: Move intel_context::gen and gt fields to brw_context.Kenneth Graunke2013-07-091-4/+2
* i965: Move intel_context::perf_debug to brw_context.Kenneth Graunke2013-07-091-1/+0
* i965: Move intel_context::batch to brw_context.Kenneth Graunke2013-07-091-3/+2
* i965: Pass brw_context to functions rather than intel_context.Kenneth Graunke2013-07-091-28/+30
* i965: Replace #include "intel_context.h" with brw_context.h.Kenneth Graunke2013-07-091-1/+1
* i965: Drop i915-specific blit clear code.Eric Anholt2013-06-281-178/+0
* i965: Drop #ifdef I915 code.Eric Anholt2013-06-281-8/+0
* i965: Move the remaining intel code to the i965 directory.Eric Anholt2013-06-261-1/+770
* [965] Enable EXT_framebuffer_object.Eric Anholt2007-12-201-617/+1
* [965] Replace our own depth constants in intel context with GL context ones.Eric Anholt2007-12-171-1/+1
* [intel] Cleanup of */intel_blit.c to bring the two closer.Eric Anholt2007-12-171-173/+176
* [965] Convert the driver to dri_bufmgr interface and enable TTM.Eric Anholt2007-12-071-10/+18
* [965] Convert DBG macro to use FILE_DEBUG_FLAG like i915.Eric Anholt2007-11-191-2/+1
* More vblank cleanups.Michel Dänzer2007-10-301-3/+2
* Refactor and fix core vblank supportJesse Barnes2007-10-291-1/+2