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path: root/src/mesa/drivers/dri/i965/gen8_surface_state.c
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* i965/gen8: Expose surface state helpersTopi Pohjolainen2016-04-211-25/+26
* i965: Refactor resolving of auxiliary modeTopi Pohjolainen2016-02-131-33/+29
* i965/gen8: Remove dead assertionTopi Pohjolainen2016-02-101-6/+0
* i965/gen8: Initialize aux_mode to GEN8_SURFACE_AUX_MODE_NONEJordan Justen2016-02-021-2/+2
* i965/gen8+: Don't upload the MCS buffer for single-sampled texturesNeil Roberts2015-12-111-1/+5
* i965: Fix texture views of 2d array surfacesBen Widawsky2015-12-071-2/+2
* i965: use _mesa_is_array_texture instead of _mesa_tex_target_is_arrayAlejandro Piñeiro2015-12-071-1/+1
* i965: Clean up #includes in the compiler.Matt Turner2015-11-241-0/+1
* i965/gen9: Support fast clears for 32b floatBen Widawsky2015-11-201-8/+0
* i965/skl: skip fast clears for certain surface formatsBen Widawsky2015-11-201-1/+7
* i965/skl: Add fast color clear infrastructureBen Widawsky2015-11-201-1/+15
* i965/gen8+: Extract color clear surface stateBen Widawsky2015-11-031-6/+15
* i965/gen8+: Remove redundant zeroing of surface stateBen Widawsky2015-11-031-12/+0
* i965/gen8: Remove gen<8 checks in gen8 codeChad Versace2015-10-091-4/+4
* i965/miptree: Rename align_w,align_h -> halign,valignChad Versace2015-09-301-6/+6
* i965: Use helper function intel_get_tile_dims() in surface setupAnuj Phogat2015-09-281-2/+12
* i965/chv|skl: Apply sampler bypass w/aBen Widawsky2015-08-311-0/+14
* i965/gen9: Use custom MOCS entries set up by the kernel.Francisco Jerez2015-07-161-2/+1
* i965/gen9: use an unreserved surface alignment valueNanley Chery2015-07-011-4/+4
* i965/gen9: Disable Mip Tail for YF/YS tiled surfacesAnuj Phogat2015-06-161-2/+8
* i965/gen9: Set vertical and horizontal surface alignmentsAnuj Phogat2015-06-161-6/+26
* i965: Use BRW_SURFACE_* in place of GL_TEXTURE_*Anuj Phogat2015-06-161-3/+3
* i965/gen9: Set tiled resource mode in surface stateAnuj Phogat2015-06-161-0/+21
* i965/gen8+: Add aux buffer alignment assertionsBen Widawsky2015-06-121-0/+22
* i965: Add Gen9 surface state decodingBen Widawsky2015-05-181-7/+8
* i965: Refactor rb surface setup to allow caller to store offsetsTopi Pohjolainen2015-04-301-9/+9
* i965/gen8: Use constant pointers for reading miptree detailsTopi Pohjolainen2015-04-301-2/+2
* i965/gen8: Factor out texture surface state set-up from gen8_update_texture_s...Francisco Jerez2015-04-271-60/+77
* i965: replace __FUNCTION__ with __func__Marius Predut2015-04-141-1/+1
* i965: Fix depth field setting in surface state for raw buffer on Gen7/8Zhenyu Wang2015-04-081-2/+5
* i965: Make sure we always mark array surfaces as suchIago Toral Quiroga2015-04-061-1/+3
* i965: Remove the create_raw_surface vtbl hook.Francisco Jerez2015-03-021-16/+0
* i965: Generalize the update_null_renderbuffer_surface vtbl hook to non-render...Francisco Jerez2015-02-101-15/+10
* i965: Enable L3 caching of buffer surfaces.Francisco Jerez2015-01-311-2/+1
* i965/gen8: Include the buffer offset when emitting renderbuffer relocsJason Ekstrand2015-01-281-1/+1
* i965: Apply the miptree offset to surface state for renderbuffersJason Ekstrand2015-01-221-1/+2
* i965: Micro-optimize swizzle_to_scs() and make it inlinable.Kenneth Graunke2015-01-041-4/+21
* i965/skl: Use new MOCS for SKLKristian Høgsberg2014-11-031-3/+5
* i965/skl: Allocate 16 DWords for SURFACE_STATE on Skylake.Kenneth Graunke2014-11-031-1/+1
* i965/skl: Refactor surface state allocation.Kenneth Graunke2014-11-031-10/+16
* i965: Use BDW_MOCS_PTE for renderbuffers.Kenneth Graunke2014-10-091-1/+1
* i965: Add a comment about null renderbuffer surfaces and why they exist.Eric Anholt2014-07-021-2/+6
* i965: Use unreachable() instead of unconditional assert().Matt Turner2014-07-011-4/+2
* i965: Hook up the MCS buffers in SURFACE_STATE on Broadwell.Kenneth Graunke2014-06-261-0/+10
* i965: Add plumbing for Broadwell's auxiliary surface support.Kenneth Graunke2014-06-261-7/+37
* i965: Set the fast clear color value for texture surfacesNeil Roberts2014-06-121-1/+3
* i965/gen8: Surface state overriding for stencilTopi Pohjolainen2014-05-151-13/+21
* i965/gen8 renderbuffer: Set depth size based on LOD0 for 3D texturesJordan Justen2014-05-131-1/+1
* i965/gen8: Use helper variables for surface parametersTopi Pohjolainen2014-05-121-4/+8
* Revert "i965: Fix depth (array slices) computation for 1D_ARRAY render targets."Kenneth Graunke2014-05-091-3/+0