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path: root/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
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* i965/miptree: Rename align_w,align_h -> halign,valignChad Versace2015-09-301-4/+4
* i965: Refactor rb surface setup to allow caller to store offsetsTopi Pohjolainen2015-04-301-14/+14
* i965/gen7: Factor out texture surface state set-up from gen7_update_texture_s...Francisco Jerez2015-04-271-54/+73
* i965: replace __FUNCTION__ with __func__Marius Predut2015-04-141-1/+1
* i965: Fix depth field setting in surface state for raw buffer on Gen7/8Zhenyu Wang2015-04-081-2/+5
* i965: Make sure we always mark array surfaces as suchIago Toral Quiroga2015-04-061-1/+3
* i965: Remove the create_raw_surface vtbl hook.Francisco Jerez2015-03-021-19/+0
* i965: Generalize the update_null_renderbuffer_surface vtbl hook to non-render...Francisco Jerez2015-02-101-14/+10
* i965: Fix integer border color on Haswell.Kenneth Graunke2015-02-091-0/+3
* i965: Enable L3 caching of buffer surfaces.Francisco Jerez2015-01-311-3/+1
* i965: Apply the miptree offset to surface state for renderbuffersJason Ekstrand2015-01-221-1/+2
* i965: Micro-optimize swizzle_to_scs() and make it inlinable.Kenneth Graunke2015-01-041-22/+18
* i965: Change mipmap array_spacing_lod0 to array_layout (enum)Jordan Justen2014-08-151-3/+3
* i965: Add a comment about null renderbuffer surfaces and why they exist.Eric Anholt2014-07-021-0/+8
* i965: Use unreachable() instead of unconditional assert().Matt Turner2014-07-011-2/+1
* i965: Set the fast clear color value for texture surfacesNeil Roberts2014-06-121-1/+3
* i965/gen7 renderbuffer: Set depth size based on LOD0 for 3D texturesJordan Justen2014-05-131-1/+1
* Revert "i965: Fix depth (array slices) computation for 1D_ARRAY render targets."Kenneth Graunke2014-05-091-2/+0
* i965/Gen7: Set up layer constraints properly for renderbuffersChris Forbes2014-05-091-10/+7
* i965: Fix depth (array slices) computation for 1D_ARRAY render targets.Kenneth Graunke2014-05-071-0/+2
* i965: Drop use of intel_region from miptrees.Eric Anholt2014-05-011-16/+16
* i965: Adjust surface_state emission to account for view parametersChris Forbes2014-04-101-5/+14
* i965/wm: Use resolved miptree consistently in surface setupTopi Pohjolainen2014-03-051-5/+5
* i965: Use ffs() for sample counting in gen7_surface_msaa_bits().Kenneth Graunke2014-02-191-6/+4
* mesa: change gl_format to mesa_formatMark Mueller2014-01-271-1/+1
* i965: Use the new drm_intel_bo offset64 field.Kenneth Graunke2014-01-201-7/+7
* i965/Gen7: Only emit cube face enables for cubes.Chris Forbes2014-01-191-2/+5
* i965: Remove unused depth_mode parameter from translate_tex_format().Kenneth Graunke2013-12-291-1/+0
* i965/Gen7: emit mcs info for multisample texturesChris Forbes2013-12-071-0/+5
* i965: Make swizzle_to_scs non-static.Kenneth Graunke2013-11-161-6/+6
* i965: Combine {brw,gen7}_update_texture_buffer_surface() functions.Kenneth Graunke2013-11-051-39/+1
* i965: Unvirtualize brw_create_constant_surface; delete Gen7+ variant.Kenneth Graunke2013-11-051-27/+0
* i965: Virtualize emit_buffer_surface_state().Kenneth Graunke2013-11-051-0/+1
* i965: Simplify the shader time code by using atomic counter helpers.Francisco Jerez2013-10-291-17/+0
* i965: Define vtbl method that initializes an untyped R/W surface.Francisco Jerez2013-10-291-5/+30
* i965: Try to avoid stalls on the GPU when doing glBufferSubData().Eric Anholt2013-10-231-1/+1
* i965: Add support for GL_ARB_texture_buffer_range.Eric Anholt2013-10-231-4/+10
* i965: Make a brw_stage_prog_data for storing the SURF_INDEX information.Eric Anholt2013-10-151-2/+5
* i965/hsw: Apply gather4 RG32F w/a using SCS instead of shader.Chris Forbes2013-10-031-6/+8
* i965: Emit a second set of SURFACE_STATE for gather4 from textures.Chris Forbes2013-10-031-1/+5
* i965: Totally switch around how we handle nonzero baselevel-first_level.Eric Anholt2013-09-301-1/+3
* i965: Always look up from the object's mt when setting up texturing state.Eric Anholt2013-09-301-2/+1
* i965/gen7.5: Fix missing Shader Channel Select entries on HaswellAbdiel Janulgue2013-09-211-0/+7
* i965: Refactor Gen7+ SURFACE_STATE setup for buffer surfaces.Kenneth Graunke2013-09-191-86/+60
* i965: Fix off by one errors in texture buffer size calculations.Kenneth Graunke2013-09-191-1/+1
* i965: Use brw_stage_state for WM data as well.Kenneth Graunke2013-09-131-4/+4
* i965: Modify signature to update_texture_surface functions.Paul Berry2013-08-311-9/+7
* i965/gen7: Use the base_level field of the sampler to handle GL's BASE_LEVEL.Eric Anholt2013-08-301-11/+3
* i965/gen7: Set MOCS L3 cacheability for IVB/BYT (v2)Ville Syrjälä2013-08-211-3/+2
* i965: Use SURF_INDEX_DRAW() for drawbuffer binding table indices.Kenneth Graunke2013-08-191-6/+8
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