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path: root/src/mesa/drivers/dri/i965/gen6_blorp.cpp
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* i965/miptree: Rename align_w,align_h -> halign,valignChad Versace2015-09-301-1/+1
* i965: Remove base miplevel from sampler state.Ben Widawsky2015-09-041-1/+0
* i965: Rename intel_emit* to reflect their new location in brw_pipe_controlChris Wilson2015-06-241-3/+3
* i965/blorp: Prepare drawing rectangle for flipped coordinatesTopi Pohjolainen2015-04-301-2/+2
* i965/blorp: Add support for layered renderingTopi Pohjolainen2015-04-301-1/+1
* i965/blorp: Allow blend state to be set for multiple render targetsTopi Pohjolainen2015-04-301-11/+11
* i965/blorp: Prepare for attributes other than render positionTopi Pohjolainen2015-04-301-2/+3
* i965/blorp: Remove unused argumentsTopi Pohjolainen2015-04-301-13/+7
* i965/blorp: Allow caller to provide sampler settingsTopi Pohjolainen2015-04-301-6/+9
* i965/blorp: Refactor vertex buffer state setupTopi Pohjolainen2015-04-301-26/+34
* i965/hiz: Start to separate miptree out from hiz buffersJordan Justen2015-03-091-1/+1
* i965: Do Sandybridge workaround flushes before each primitive.Kenneth Graunke2015-02-171-20/+11
* i965/gen6/gs: Set brw->gs.enabled to FALSE in gen6_blorp_emit_gs_disable()Samuel Iglesias Gonsalvez2014-09-191-0/+1
* i965/gen6: Stencil/hiz needs an offset for LOD > 0Jordan Justen2014-08-151-1/+9
* i965/gen6 depth surface: program 3DSTATE_DEPTH_BUFFER to top of surfaceJordan Justen2014-08-151-49/+22
* i965/gen6 blorp depth: calculate base surface width/heightJordan Justen2014-08-151-0/+13
* i965/gen6 depth surface: calculate minimum array element being renderedJordan Justen2014-08-151-0/+2
* i965/gen6 depth surface: calculate LOD being rendered toJordan Justen2014-08-151-0/+3
* i965/gen6 depth surface: calculate depth (array size) for depth surfaceJordan Justen2014-08-151-0/+2
* i965/gen6 depth surface: calculate more specific surface typeJordan Justen2014-08-151-0/+17
* i965: Make BLORP use brw_emit_sampler_state().Kenneth Graunke2014-08-021-37/+28
* i965/blorp: Don't set min_mag_neq bit in Gen6 SAMPLER_STATE.Kenneth Graunke2014-08-021-2/+0
* i965: Use unreachable() instead of unconditional assert().Matt Turner2014-07-011-2/+1
* i965: Drop use of intel_region from miptrees.Eric Anholt2014-05-011-10/+10
* i965: Move intel_region_get_aligned_offset() to be a miptree function.Eric Anholt2014-05-011-9/+9
* i965/blorp: do not use unnecessary hw-blending supportTopi Pohjolainen2014-02-041-20/+0
* i965: Use the new drm_intel_bo offset64 field.Kenneth Graunke2014-01-201-2/+2
* i965/gen6/blorp: Remove redundant HiZ workaroundChad Versace2014-01-091-14/+0
* i965/gen6/blorp: Set need_workaround_flush at top of blorpChad Versace2014-01-091-1/+3
* i965/gen6/blorp: Set need_workaround_flush immediately after primitiveChad Versace2014-01-091-0/+3
* i965/gen6: Fix HiZ hang in WebGL Google MapsChad Versace2013-12-201-0/+15
* i965/blorp: Get rid of redundant num_samples blorp param.Paul Berry2013-12-091-4/+6
* i965: refactor sample mask calculationChris Forbes2013-12-071-1/+1
* i965: Drop trailing whitespace from the rest of the driver.Kenneth Graunke2013-12-051-2/+2
* i965: Avoid flushing the batch for every blorp op.Eric Anholt2013-11-071-12/+0
* i965: Also emit HiZ and Stencil packets when disabling depth on Gen6.Kenneth Graunke2013-10-281-0/+12
* i965: Also guard 3DSTATE_DRAWING_RECTANGLE with a flush in blorp.Kenneth Graunke2013-10-281-0/+3
* i965: Directly call intel_batchbuffer_flush() after i915 split.Eric Anholt2013-08-301-3/+1
* i965/gen7: Set MOCS L3 cacheability for IVB/BYT (v2)Ville Syrjälä2013-08-211-2/+2
* i965/hsw: Populate MOCS for STATE_BASE_ADDRESS (v2)Ville Syrjälä2013-08-211-1/+6
* i965: Add Gen6 depth stall flushes before disabling depth in BLORP.Kenneth Graunke2013-08-161-0/+3
* i965/hsw: Change L3 MOCS of 3DSTATE_VERTEX_BUFFERSChad Versace2013-07-181-0/+3
* i965: Remove old BSpec reference from BLORP's 3DSTATE_WM/PS packets.Kenneth Graunke2013-07-151-3/+3
* i965: Update workaround flush comments for Gen6 3DSTATE_VS.Kenneth Graunke2013-07-151-1/+1
* i965: Delete intel_context entirely.Kenneth Graunke2013-07-091-2/+2
* i965: Move intel_context::gen and gt fields to brw_context.Kenneth Graunke2013-07-091-7/+3
* i965: Move intel_context::batch to brw_context.Kenneth Graunke2013-07-091-7/+5
* i965: Pass brw_context to functions rather than intel_context.Kenneth Graunke2013-07-091-34/+4
* i965: Replace intel_state.c enums with those from brw_defines.h.Kenneth Graunke2013-07-031-1/+1
* i965/gen7+: Create an enum for keeping track of fast color clear state.Paul Berry2013-06-121-0/+1
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