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i965
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brw_wm_pass2.c
Commit message (
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Author
Age
Files
Lines
*
mesa: put _mesa_ prefix on vert_result_to_frag_attrib()
Brian Paul
2011-09-06
1
-1
/
+1
*
Refactor code that converts between gl_vert_result and gl_frag_attrib.
Paul Berry
2011-09-06
1
-8
/
+1
*
i965: Fix gen6 interpolation setup for 16-wide.
Eric Anholt
2010-12-06
1
-15
/
+26
*
i965: Move payload reg setup to compile, not lookup time.
Eric Anholt
2010-12-06
1
-2
/
+2
*
intel: Annotate debug printout checks with unlikely().
Eric Anholt
2010-11-03
1
-2
/
+2
*
i965: Align the number of payload regs to 2 again in 16-wide mode.
Eric Anholt
2010-08-30
1
-1
/
+1
*
i965: Rename nr_depth_regs to nr_payload_regs.
Eric Anholt
2010-08-20
1
-2
/
+2
*
Merge branch 'outputswritten64'
Ian Romanick
2009-11-17
1
-2
/
+2
*
i965: Fix varying payload reg assignment for the non-GLSL-instructions path.
Eric Anholt
2009-05-14
1
-8
/
+10
*
i965: Fix register allocation of GLSL fp inputs.
Eric Anholt
2009-05-14
1
-2
/
+1
*
i965: whitespace changes and reformatting
Brian Paul
2009-01-22
1
-15
/
+13
*
fix compile for previous commit
Zou Nan hai
2008-02-19
1
-1
/
+1
*
[i965] fix broken glsl texdemo1
Zou Nan hai
2008-02-19
1
-1
/
+8
*
i965: use setup attributes as inputs when allocating registers
Xiang, Haihao
2008-02-14
1
-1
/
+2
*
support branch and loop in pixel shader
Zou Nan hai
2007-06-21
1
-1
/
+1
*
Update DRI drivers for new glsl compiler.
Brian
2007-02-23
1
-3
/
+1
*
Add Intel i965G/Q DRI driver.
Eric Anholt
2006-08-09
1
-0
/
+338