index
:
mesa.git
gallium_va_encpackedheader01
master
Unnamed repository; edit this file 'description' to name the repository.
about
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
src
/
mesa
/
drivers
/
dri
/
i965
/
brw_wm_pass0.c
Commit message (
Expand
)
Author
Age
Files
Lines
*
i965: avoid memsetting all the BRW_WM_MAX_INSN arrays for every compile.
Eric Anholt
2009-11-10
1
-0
/
+3
*
i965: use macros to get/set prog_instruction::Aux field
Brian Paul
2009-10-29
1
-2
/
+2
*
i965: Handle scalar result swizzling in shared GLSL/non-GLSL code.
Eric Anholt
2009-08-12
1
-32
/
+1
*
mesa: merge the prog_src_register::NegateBase and NegateAbs fields
Brian Paul
2009-04-14
1
-1
/
+1
*
mesa: replace old prog_instruction::Sampler field with Aux field
Brian Paul
2009-02-26
1
-2
/
+2
*
i965: use the new prog_instruction::TexShadow field
Brian Paul
2009-02-20
1
-0
/
+1
*
i965: the return value of translate_insn() is never used. Make it void.
Brian Paul
2009-02-13
1
-4
/
+3
*
i965: fix bug in pass0_precalc_mov()
Brian Paul
2009-01-28
1
-3
/
+11
*
i965: minor comment additions/edits
Brian Paul
2009-01-28
1
-1
/
+6
*
i965: whitespace changes and reformatting
Brian Paul
2009-01-22
1
-22
/
+14
*
[i965] multiple rendering target support
Zou Nan hai
2008-03-13
1
-0
/
+2
*
Initial 965 GLSL support
Zou Nan hai
2007-04-12
1
-0
/
+4
*
Update DRI drivers for new glsl compiler.
Brian
2007-02-23
1
-3
/
+1
*
Add Intel i965G/Q DRI driver.
Eric Anholt
2006-08-09
1
-0
/
+464