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* Merge branch 'mesa_7_5_branch'Brian Paul2009-06-161-1/+1
|\ | | | | | | | | | | Conflicts: src/mesa/main/api_validate.c
| * i965: fix bugs in projective texture coordinatesBrian Paul2009-06-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For the TXP instruction we check if the texcoord is really a 4-component atttibute which requires the divide by W step. This check involved the projtex_mask field. However, the projtex_mask field was being miscalculated because of some confusion between vertex program outputs and fragment program inputs. 1. Rework the size_masks calculation so we correctly set bits corresponding to fragment program input attributes. 2. Rename projtex_mask to proj_attrib_mask since we're interested in more than just texcoords (generic varying vars too). 3. Simply the indexing of the size_masks and proj_attrib_mask fields. 4. The tracker::active[] array was mis-dimensioned. Use MAX_PROGRAM_TEMPS instead of a magic number. 5. Update comments, add new assertions. With these changes the Lightsmark demo/benchmark renders correctly, until we eventually hit a GPU lockup...
| * i965: only upload constant buffer data when we actually need the const bufferBrian Paul2009-04-271-2/+0
| | | | | | | | | | | | | | Make the use_const_buffer field per-program and only call the code which updates the constant buffer's data if the flag is set. This should undo the perf regression from 20f3497e4b6756e330f7b3f54e8acaa1d6c92052
* | i965: interpolate colors with perspective correction by defaultBrian Paul2009-06-121-0/+1
| | | | | | | | | | | | | | ...rather than with linear interpolation. Modern hardware should use perspective-corrected interpolation for colors (as for texcoords). glHint(GL_PERSPECTIVE_CORRECTION_HINT, mode) can be used to get linear interpolation if mode = GL_FASTEST.
* | i965: Fix register allocation of GLSL fp inputs.Eric Anholt2009-05-141-0/+1
| | | | | | | | | | | | | | | | | | Before, if the VP output something that is in the attributes coming into the WM but which isn't used by the WM, then WM would end up reading subsequent varyings from the wrong places. This was visible with a GLSL demo using gl_PointSize in the VS and a varying in the WM, as point size is in the VUE but not used by the WM. There is now a regression test in piglit, glsl-unused-varying.
* | i965: don't use GRF regs 126,127 for WM programsBrian Paul2009-05-081-0/+2
| | | | | | | | | | | | | | They seem to be used for something else and using them for shader temps seems to lead to GPU lock-ups. Call _mesa_warning() when we run out of temps. Also, clean up some debug code.
* | i965: only upload constant buffer data when we actually need the const bufferBrian Paul2009-04-271-2/+0
| | | | | | | | | | | | | | | | | | Make the use_const_buffer field per-program and only call the code which updates the constant buffer's data if the flag is set. This should undo the perf regression from 20f3497e4b6756e330f7b3f54e8acaa1d6c92052 (cherry picked from master, commit dc9705d12d162ba6d087eb762e315de9f97bc456)
* | i965: rework GLSL/WM register allocationBrian Paul2009-04-241-1/+4
|/ | | | | | | | | Use a bitvector of used/free flags. If we run out of temps, examine the live intervals of the temp regs in the program and free those which are no longer alive. Also, enable the new WM const buffer code.
* i965: another checkpoint commit of new constant buffer supportBrian Paul2009-04-031-0/+8
| | | | | Everything is in place now for using a true constant buffer for GLSL fragment shaders. Still some bugs to find though.
* i965: fix indentationBrian Paul2009-04-031-2/+2
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* i965: Fix glFrontFacing in twoside GLSL demo.Eric Anholt2009-03-231-1/+2
| | | | | | | This also cuts instructions by just using the existing bit in the payload rather than computing it from the determinant in the SF unit and passing it as a varying down to the WM. Something still goes wrong with getting the backface color right, but a simpler shader appears to get the right result.
* i965: remove unused PROGRAM_INTERNAL_PARAM, added commentBrian Paul2009-03-131-3/+1
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* i965: commentsBrian Paul2009-03-061-0/+2
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* i965: use the new prog_instruction::TexShadow fieldBrian Paul2009-02-201-0/+1
| | | | | GLSL shadow() sampler calls are properly propogated down to the driver now. The glean glsl1 shadow() tests work (except for the alpha channel).
* i965: rewrite the code for handling shader subroutine callsBrian Paul2009-02-131-0/+2
| | | | | | | | | | | | | | | | | | Previously, the prog_instruction::Data field was used to map original Mesa instructions to brw instructions in order to resolve subroutine calls. This was a rather tangled mess. Plus it's an obstacle to implementing dynamic allocation/growing of the instruction buffer (it's still a fixed size). Mesa's GLSL compiler emits a label for each subroutine and CAL instruction. Now we use those labels to patch the subroutine calls after code generation has been done. We just keep a list of all CAL instructions that needs patching and a list of all subroutine labels. It's a simple matter to resolve them. This also consolidates some redundant post-emit code between brw_vs_emit.c and brw_wm_glsl.c and removes some loops that cleared the prog_instruction::Data fields at the end. Plus, a bunch of new comments.
* i965: implement GL_EXT_texture_swizzleBrian Paul2009-01-281-0/+2
| | | | | If the texture swizzle is not XYZW (no-op) add an extra MOV instruction after the TEX instruction to rearrange the components.
* i965: remove pad fieldBrian Paul2009-01-281-1/+0
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* i965: widen per-texture bitfields for 16 texture image unitsBrian Paul2009-01-281-5/+5
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* i915: Remove dead early z enable bit which was always on.Eric Anholt2008-11-281-2/+1
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* i965: implement the missing OPCODE_NOISE1 and OPCODE_NOISE2 instructions.Gary Wong2008-10-311-0/+2
| | | | (Only in fragment shaders, so far. Support for NOISE3 and NOISE4 to come.)
* i965: Allocate temporaries contiguously with other regs in fragment shaders.Gary Wong2008-10-281-0/+2
| | | | | This is required for threads to be spawned with correctly sized GRF register blocks.
* [i965] multiple rendering target fixZou Nan hai2008-03-211-0/+1
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* [i965] multiple rendering target supportZou Nan hai2008-03-131-0/+2
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* [i965] fix fd.o bug #11471 and #11478Zou Nan hai2008-03-071-1/+2
| | | | | 1. Follow EXT_texture_rectangle with YCbCr texture 2. swap UV component for MESA_FORMAT_YCBCR
* [965] Bug #9151: make fragment.position return window coords not screen coords.Eric Anholt2008-02-281-0/+2
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* i965: new integrated graphics chipset supportXiang, Haihao2008-01-291-1/+1
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* [intel] warnings cleanupEric Anholt2007-12-141-1/+1
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* Merge branch '965-glsl'Zou Nan hai2007-10-261-0/+12
|\ | | | | | | | | | | | | Conflicts: src/mesa/drivers/dri/i965/brw_sf.h src/mesa/drivers/dri/i965/intel_context.c
| * support nested function call in pixel shaderZou Nan hai2007-09-281-1/+1
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| * DDX DDY support, not very accurateZou Nan hai2007-07-241-0/+1
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| * support "discard";Zou Nan hai2007-07-051-0/+1
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| * support branch and loop in pixel shaderZou Nan hai2007-06-211-0/+10
| | | | | | | | most of the sample working with some small modification
* | Fix-up #includes to remove some -I options.Brian2007-09-111-1/+1
|/ | | | eg: #include "shader/program.h" and remove -I$(TOP)/src/mesa/program
* Update DRI drivers for new glsl compiler.Brian2007-02-231-1/+1
| | | | | | Mostly: - update #includes - update STATE_* token code
* restore debug output after brw_wm_fp compilation stageKeith Whitwell2006-09-201-0/+1
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* Add Intel i965G/Q DRI driver.Eric Anholt2006-08-091-0/+261
This driver comes from Tungsten Graphics, with a few further modifications by Intel.
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