summaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers/dri/i965/brw_wm.h
Commit message (Expand)AuthorAgeFilesLines
* i915: Remove dead early z enable bit which was always on.Eric Anholt2008-11-281-2/+1
* i965: implement the missing OPCODE_NOISE1 and OPCODE_NOISE2 instructions.Gary Wong2008-10-311-0/+2
* i965: Allocate temporaries contiguously with other regs in fragment shaders.Gary Wong2008-10-281-0/+2
* [i965] multiple rendering target fixZou Nan hai2008-03-211-0/+1
* [i965] multiple rendering target supportZou Nan hai2008-03-131-0/+2
* [i965] fix fd.o bug #11471 and #11478Zou Nan hai2008-03-071-1/+2
* [965] Bug #9151: make fragment.position return window coords not screen coords.Eric Anholt2008-02-281-0/+2
* i965: new integrated graphics chipset supportXiang, Haihao2008-01-291-1/+1
* [intel] warnings cleanupEric Anholt2007-12-141-1/+1
* Merge branch '965-glsl'Zou Nan hai2007-10-261-0/+12
|\
| * support nested function call in pixel shaderZou Nan hai2007-09-281-1/+1
| * DDX DDY support, not very accurateZou Nan hai2007-07-241-0/+1
| * support "discard";Zou Nan hai2007-07-051-0/+1
| * support branch and loop in pixel shaderZou Nan hai2007-06-211-0/+10
* | Fix-up #includes to remove some -I options.Brian2007-09-111-1/+1
|/
* Update DRI drivers for new glsl compiler.Brian2007-02-231-1/+1
* restore debug output after brw_wm_fp compilation stageKeith Whitwell2006-09-201-0/+1
* Add Intel i965G/Q DRI driver.Eric Anholt2006-08-091-0/+261
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-03 08:41:09 +0000