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path: root/src/mesa/drivers/dri/i965/brw_vtbl.c
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* Merge commit 'origin/mesa_7_7_branch'Maciej Cencora2009-11-231-3/+9
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| * i965: Fix several memory leaks on exit.Eric Anholt2009-11-211-3/+9
* | intel: Consistently use no_batch_wrap in intel_context struct.Eric Anholt2009-11-191-3/+0
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* intel: Use PIPE_CONTROL on gen4 hardware for doing pipeline flushing.Eric Anholt2009-11-061-15/+0
* intel: Remove some dead metaops code.Eric Anholt2009-09-281-2/+0
* intel: Move note_unlock() implementation to the one place it's needed.Eric Anholt2009-06-291-9/+0
* i965: Don't set a reserved bit in MI_FLUSH.Eric Anholt2009-06-231-1/+1
* i965: checkpoint commit: VS constant buffersBrian Paul2009-04-141-0/+1
* i965: Remove dead flushing code.Eric Anholt2009-03-051-18/+0
* i965: rename draw_regions -> color_regionsroot2009-02-261-11/+11
* intel: Clean up several 965 memory leaks on context destroy.Eric Anholt2009-02-171-0/+3
* i965: Delete old metaops code now that there are no remaining consumers.Eric Anholt2009-02-021-1/+0
* i965: formatting, comments, whitespace clean-upsBrian Paul2009-01-301-33/+39
* i965: Remove BRW_WM_LOCK dirty bit, introduced to work around lack of relocs.Eric Anholt2008-11-281-2/+0
* i965: Fix compiler warning from unused var.Eric Anholt2008-10-271-1/+0
* i965: Add ARB_occlusion_query support.Eric Anholt2008-10-071-0/+10
* Remove TNL-to-VP tracking from i965Ian Romanick2008-09-281-1/+0
* intel: Fix a number of memory leaks on context destroy.Eric Anholt2008-09-261-0/+34
* i965: Cope with batch getting flushed in the middle of batchbuffer emits.Eric Anholt2008-09-231-2/+1
* mesa: added "main/" prefix to includes, remove some -I paths from Makefile.te...Brian Paul2008-09-181-5/+5
* intel: Fix refcounting on depth buffer initialization in DRI2.Eric Anholt2008-09-031-15/+3
* DRI2: Drop sarea, implement swap buffers in the X server.Kristian Høgsberg2008-08-291-3/+15
* [i965] multiple rendering target supportZou Nan hai2008-03-131-6/+9
* [965] Convert brw_draw_upload to managing dri_bos, not gl_buffer_objects.Eric Anholt2008-02-041-1/+5
* [965] Force a new vertex upload buffer at new batch time.Eric Anholt2008-01-141-0/+5
* [965] Improve performance by allocating CURBE buffers a page at a time.Eric Anholt2008-01-101-0/+3
* [965] Allow more than one draw_prims per batchbuffer.Eric Anholt2008-01-091-0/+3
* [965] Replace the always_update dirty flag with BRW_NEW_BATCH.Eric Anholt2008-01-091-0/+3
* [intel] Rename lost_hardware vtbl entry to new_batch.Eric Anholt2008-01-091-10/+5
* [965] Use shared intel_regions.c.Eric Anholt2007-12-151-2/+2
* [965] Replace the state cache suballocator with direct dri_bufmgr use.Eric Anholt2007-12-141-3/+2
* [965] Convert the driver to dri_bufmgr interface and enable TTM.Eric Anholt2007-12-071-5/+3
* [965] Remove AUB file support.Eric Anholt2007-09-271-3/+0
* Merge branch 'master' of git+ssh://[email protected]/git/mesa/mesa i...Keith Whitwell2007-01-161-0/+1
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| * Add accelerated CopyPixels for non-overlapping, 1:1 blits.Eric Anholt2006-11-291-0/+1
* | cleanup code, compiles with vbo changesKeith Whitwell2006-10-311-9/+1
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* Make sure bmBufferOffset is called for all active buffers every timeKeith Whitwell2006-09-071-0/+2
* Add Intel i965G/Q DRI driver.Eric Anholt2006-08-091-0/+190