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path: root/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
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* i965: Enable ARB_shader_atomic_counter_opsIan Romanick2016-10-041-3/+13
* i965: Refactor emission of atomic counter operationsIan Romanick2016-10-041-15/+4
* i965/vec4: Replace vec4_instruction::regs_written with ::size_written field i...Francisco Jerez2016-09-141-1/+1
* i965/vec4: Replace dst/src_reg::reg_offset with dst/src_reg::offset expressed...Francisco Jerez2016-09-141-1/+1
* i965/vec4: add support for packing vs/gs/tes outputsTimothy Arceri2016-07-211-1/+8
* i965/vec4: add support for packing inputsTimothy Arceri2016-07-211-0/+2
* i965: Stop muging cube array lengths by 6Jason Ekstrand2016-07-201-7/+1
* i965: Use LZD to implement nir_op_find_lsb on Gen < 7Ian Romanick2016-07-191-2/+24
* i965: Use LZD to implement nir_op_ifind_msb on Gen < 7Ian Romanick2016-07-191-11/+46
* i965: Use LZD to implement nir_op_ufind_msbIan Romanick2016-07-191-0/+23
* i965: Pass nir_src/nir_dest by reference.Matt Turner2016-05-201-6/+6
* i965: Silence unused parameter warningsIan Romanick2016-05-181-10/+5
* nir: Switch the arguments to nir_foreach_functionJason Ekstrand2016-04-281-2/+2
* nir: Switch the arguments to nir_foreach_instrJason Ekstrand2016-04-281-2/+2
* i965/nir: fixup for new foreach_block()Connor Abbott2016-04-281-4/+4
* nir: rename nir_foreach_block*() to nir_foreach_block*_call()Connor Abbott2016-04-201-1/+1
* i965/vec4: Use the correct offset for the swizzle shift in push constantsJason Ekstrand2016-04-201-1/+1
* i965/vec4: Use nir_intrinsic_base in the load_uniform implementationJason Ekstrand2016-04-201-1/+1
* i965/vec4: Support full std140 layout for push constantsJason Ekstrand2016-04-151-5/+25
* i965/vec4: Get rid of the uniform_size arrayJason Ekstrand2016-04-141-9/+0
* i965/vec4: Use MOV_INDIRECT instead of reladdr for indirect push constantsJason Ekstrand2016-04-141-4/+6
* i965/vec4: Use UD rather than D for uniform indirectsJason Ekstrand2016-04-141-1/+1
* i965: Implement the new imod and irem opcodesJason Ekstrand2016-04-131-0/+36
* i965: Port INTEL_PRECISE_TRIG=1 to NIR.Kenneth Graunke2016-04-111-14/+2
* i965/nir: Provide a default LOD for buffer texturesJason Ekstrand2016-04-041-0/+4
* i965: Add an INTEL_PRECISE_TRIG=1 option to fix SIN/COS output range.Kenneth Graunke2016-04-041-2/+14
* i965: Add an implemnetation of nir_op_fquantize2f16Jason Ekstrand2016-04-011-0/+25
* nir: rename nir_const_value fields to include bitsize informationIago Toral Quiroga2016-03-171-22/+22
* i965/vec4/nir: no need to use surface_access:: to call emit_untyped_atomicAlejandro Piñeiro2016-03-081-6/+5
* i965/vec4/nir: remove emit_untyped_surface_read and emit_untyped_atomic at br...Alejandro Piñeiro2016-03-081-13/+23
* i965: Push most TES inputs in vec4 mode.Kenneth Graunke2016-02-291-3/+1
* nir: Remove the const_offset from nir_tex_instrJason Ekstrand2016-02-101-10/+11
* i965/vec4: Plumb separate surfaces and samplers through from NIRJason Ekstrand2016-02-091-3/+12
* nir: Separate texture from sampler in nir_tex_instrJason Ekstrand2016-02-091-0/+3
* nir/tex_instr: Rename sampler to textureJason Ekstrand2016-02-091-12/+12
* i965/vec4: Implement nir_op_pack_uvec2_to_uint.Matt Turner2016-02-011-0/+18
* i965/vec4: Spaces around operators.Matt Turner2016-01-191-1/+1
* i965/vec4: Use UW type for multiply into accumulator on GEN8+Jason Ekstrand2016-01-151-1/+5
* nir: Lower bitfield_extract.Matt Turner2016-01-141-0/+3
* glsl: Delete the ir_binop_bfm and ir_triop_bfi opcodes.Kenneth Graunke2016-01-131-2/+1
* i965: Add support for gl_DrawIDARB and enable extensionKristian Høgsberg Kristensen2015-12-291-0/+8
* i965: Add support for gl_BaseVertexARB and gl_BaseInstanceARBKristian Høgsberg Kristensen2015-12-291-0/+8
* nir: Get rid of function overloadsJason Ekstrand2015-12-281-8/+8
* i965: Add tessellation control shaders.Kenneth Graunke2015-12-221-1/+22
* i965/vec4: Optimize predicate handling for any/all.Matt Turner2015-12-181-18/+75
* nir: Delete bany, ball, fany, fall.Matt Turner2015-12-181-14/+0
* nir: Get rid of *_indirect variants of input/output load/store intrinsicsJason Ekstrand2015-12-101-55/+40
* i965: Make uniform offsets be in terms of bytesJason Ekstrand2015-12-071-4/+8
* i965/vec4: Use a stride of 1 and byte offsets for UBOsJason Ekstrand2015-12-071-13/+3
* i965/vec4: Use byte offsets for UBO pulls on Sandy BridgeJason Ekstrand2015-12-071-5/+13