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path: root/src/mesa/drivers/dri/i965/brw_vec4.cpp
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* i965/vec4: Get rid of the uniform_vector_size arrayJason Ekstrand2015-10-021-1/+0
* i965/vec4: Use the actual channels used in pack_uniform_registersJason Ekstrand2015-10-021-14/+37
* i965/vs: Move lazy NIR creation to codegen_vs_progJason Ekstrand2015-10-021-12/+0
* i965/vec4: Always use NIRJason Ekstrand2015-10-021-31/+8
* i965/vec4: Implement VS_OPCODE_GET_BUFFER_SIZESamuel Iglesias Gonsalvez2015-09-251-0/+1
* i965/vec4: Don't coalesce regs in Gen6 MATH ops if reswizzle/writemask neededAntia Puentes2015-09-231-2/+10
* i965/vec4: Detect and delete useless MOVs.Matt Turner2015-09-221-0/+22
* i965: Move perf_debug code to brw_codegen_*_prog()Kristian Høgsberg Kristensen2015-09-141-19/+0
* i965/vec4: Fix saturation errors when coalescing registersAntia Puentes2015-09-141-0/+21
* i965/vec4: Don't reswizzle hardware registersJason Ekstrand2015-09-121-0/+8
* i965/vec4: check writemask when bailing out at register coalesceAlejandro Piñeiro2015-09-111-4/+6
* i965: add support for textureSamples functionIlia Mirkin2015-09-101-0/+1
* i965: Add a debug option for spilling everything in vec4 codeIago Toral Quiroga2015-09-041-1/+1
* i965: Remove the brw_vue_prog_key base class.Kenneth Graunke2015-09-031-12/+0
* i965: Move legacy clip plane handling to vec4_vs_visitor.Kenneth Graunke2015-09-031-6/+4
* i965: Delete the brw_vue_program_key::userclip_active flag.Kenneth Graunke2015-09-031-1/+1
* i965/vec4: fill src_reg type using the constructor type parameterAlejandro Piñeiro2015-09-021-0/+2
* i965: Only consider fixed_hw_reg in equals() if file is HW_REG/IMM.Matt Turner2015-08-281-2/+3
* i965/vec4: Handle uniform and GRF array access on vertex programs (NIR)Antia Puentes2015-08-031-1/+1
* i965/vec4: Enable NIR-vec4 pass on ARB_vertex_programsAntia Puentes2015-08-031-23/+24
* i965/nir: Enable NIR-vec4 pass on geometry shadersIago Toral Quiroga2015-08-031-1/+1
* i965/vec4: Add a new dst_reg constructor accepting a brw_reg_typeAlejandro Piñeiro2015-08-031-0/+11
* i965/nir: Pass a is_scalar boolean to brw_create_nir()Eduardo Lima Mitev2015-08-031-1/+1
* i965/nir/vec4: Select between new nir_vec4 or current vec4_visitor code-pathsEduardo Lima Mitev2015-08-031-4/+14
* i965/vs: Get rid of brw_vs_compile completely.Kenneth Graunke2015-07-091-19/+19
* i965/vs: Remove 'c'/vs_compile from vec4_vs_visitor.Kenneth Graunke2015-07-091-2/+2
* i965/vec4: Move c->last_scratch into vec4_visitor.Kenneth Graunke2015-07-091-2/+2
* i965/vec4: Move total_scratch calculation into the visitor.Kenneth Graunke2015-07-091-2/+5
* i965/vec4: Move perf_debug about register spilling into the visitor.Kenneth Graunke2015-07-091-3/+13
* i965/vec4: Plumb log_data through so the backend_shader field gets set.Kenneth Graunke2015-07-091-1/+1
* i965: Remove the brw_context from the visitorsJason Ekstrand2015-06-231-2/+4
* i965/vec4_vs: Add an explicit use_legacy_snorm_formula flagJason Ekstrand2015-06-231-1/+3
* i965/vs: Pass the current set of clip planes through run() and run_vs()Jason Ekstrand2015-06-231-4/+4
* i965: Pull calls to get_shader_time_index out of the visitorJason Ekstrand2015-06-231-12/+13
* i965: Use a single index per shader for shader_time.Jason Ekstrand2015-06-231-8/+10
* i965: Add compiler options to brw_compilerJason Ekstrand2015-06-231-1/+1
* i965: Remove the dependance on brw_context from the generatorsJason Ekstrand2015-06-231-2/+2
* i965: Plumb compiler debug logging through a function pointer in brw_compilerJason Ekstrand2015-06-231-2/+4
* i965: Create a shader_dispatch_mode enum to replace VS/GS fields.Kenneth Graunke2015-06-011-1/+4
* i965/vs: Rework the logic for generating NIR from ARB vertex programsJason Ekstrand2015-05-281-12/+11
* i965: Rename backend_visitor to backend_shaderJason Ekstrand2015-05-281-2/+2
* i965/fs: Combine the fs_visitor constructors.Kenneth Graunke2015-05-141-1/+2
* i965: Change header_present to header_size in backend_instructionJason Ekstrand2015-05-061-1/+1
* i965: Perform basic optimizations on the FIND_LIVE_CHANNEL opcode.Francisco Jerez2015-05-041-0/+41
* i965: Perform basic optimizations on the BROADCAST opcode.Francisco Jerez2015-05-041-0/+10
* i965: Add typed surface access opcodes.Francisco Jerez2015-05-041-0/+6
* i965: Add untyped surface write opcode.Francisco Jerez2015-05-041-0/+2
* i965/vec4: Add support for untyped surface message sends from GRF.Francisco Jerez2015-05-041-3/+4
* i965: Add brw_setup_tex_for_precompile. Use in VS, GS & FS.Jordan Justen2015-05-021-12/+1
* i965: Unhardcode a few more stage names and abbreviations.Kenneth Graunke2015-04-301-4/+2
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