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path: root/src/mesa/drivers/dri/i965/brw_vec4.cpp
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* i965/vec4: Fix dead code elimination for VGRFs of size > 1.Kenneth Graunke2014-06-151-1/+2
* i965: Make src_reg::equals() take a constant reference, not a pointer.Kenneth Graunke2014-06-101-11/+11
* i965: Give dump_instruction() a FILE* argument.Matt Turner2014-06-011-49/+55
* i965: Add writes_accumulator flagJuha-Pekka Heikkila2014-04-161-11/+4
* i965: Add is_accumulator() function.Juha-Pekka Heikkila2014-04-161-0/+17
* i965: Avoid dependency hints on math opcodesMike Stroyan2014-04-151-0/+8
* i965/vec4: Let DCE eliminate dead writes in other basic blocks.Matt Turner2014-04-151-4/+4
* i965/vec4: Consider sources of non-GRF-dst instructions for dead channels.Matt Turner2014-04-051-12/+8
* i965/vec4: do not trim dead channels on gen6 for mathTapani Pälli2014-04-021-4/+9
* i965/vec4: Don't trim writemasks of texture instructions.Matt Turner2014-03-311-2/+4
* i965/vec4: Eliminate dead writes to the flag register.Matt Turner2014-03-241-18/+48
* i965/vec4: Eliminate writes that are never read.Matt Turner2014-03-241-0/+46
* i965/vec4: Factor code out of DCE into a separate function.Matt Turner2014-03-241-34/+39
* i965/vec4: Let dead code eliminate trim dead channels.Matt Turner2014-03-241-3/+26
* i965/vec4: Track live ranges per-channel, not per vgrf.Matt Turner2014-03-241-1/+4
* i965/vec4: Don't dead code eliminate instructions writing the flag.Matt Turner2014-03-241-1/+5
* i965/vec4: Preparatory clean up of dead_code_eliminate().Matt Turner2014-03-241-22/+23
* i965/vec4: Add is_null() method to dst_reg.Matt Turner2014-03-241-0/+8
* i965/vec4: Print the predicate in dump_instructions().Matt Turner2014-03-241-0/+5
* i965: Fix register types in dump_instructions(), again.Kenneth Graunke2014-03-141-1/+1
* i965: Merge resolving of shader program sourceTopi Pohjolainen2014-03-051-1/+1
* i965: Assert array index on access to vec4_visitor's arrays.Petri Latvala2014-02-281-0/+2
* i965: Move compiler debugging output to stderr.Eric Anholt2014-02-221-48/+48
* i965: Refactor debug dumping of GLSL IR.Eric Anholt2014-02-221-11/+2
* i965: Stop throwing away our double precision for time calculations.Eric Anholt2014-02-211-1/+1
* i965: Make sure that backend_reg::type and brw_reg::type are consistent for f...Francisco Jerez2014-02-191-0/+2
* i965: Move up duplicated fields from stage-specific prog_data to brw_stage_pr...Francisco Jerez2014-02-191-38/+13
* i965/vec4: Add constructor of src_reg from a fixed hardware reg.Francisco Jerez2014-02-191-0/+8
* i965/vec4: Fix confusion between SWIZZLE and BRW_SWIZZLE macros.Francisco Jerez2014-02-121-1/+1
* i965: Fix register types in dump_instructions().Kenneth Graunke2014-02-051-1/+1
* i965: rename tex_ms to tex_cmsTopi Pohjolainen2014-01-231-1/+1
* i965: Print reg_offset for vgrf of size > 1 in dump_instruction().Matt Turner2014-01-211-1/+1
* i965: Add GS support to INTEL_DEBUG=shader_time.Paul Berry2014-01-211-3/+3
* i965: Create a new vec4 backend for Broadwell.Kenneth Graunke2014-01-181-5/+11
* i965: Stop doing our optimization on a copy of the GLSL IR.Eric Anholt2014-01-171-2/+2
* i965: Add shader opcode for sampling MCS surfaceChris Forbes2013-12-071-0/+1
* i965: Print conditional mod in dump_instruction().Matt Turner2013-12-041-1/+5
* i965: Print argument types in dump_instruction().Matt Turner2013-12-041-1/+5
* i965/vec4: Don't print swizzles for immediate values.Matt Turner2013-12-041-4/+6
* i965/vec4: Print negate and absolute value for src args.Matt Turner2013-12-041-0/+7
* i965/vec4: Add support for printing HW_REGs in dump_instruction().Matt Turner2013-12-041-0/+60
* i965: Don't print extra (null) arguments in dump_instruction().Matt Turner2013-12-041-2/+2
* i965/cfg: Clean up cfg_t constructors.Matt Turner2013-12-041-1/+1
* i965: Add a pass to remove dead control flow.Matt Turner2013-11-201-0/+2
* i965/vec4: Add invalidate_live_intervals method.Matt Turner2013-11-201-4/+4
* i965: Add a 'has_side_effects' back-end instruction predicate.Francisco Jerez2013-11-041-1/+1
* i965: Merge together opcodes for SHADER_OPCODE_GEN4_SCRATCH_READ/WRITEEric Anholt2013-10-301-2/+2
* i965/gen7: Implement code generation for untyped surface read instructions.Francisco Jerez2013-10-291-0/+1
* i965/gen7: Implement code generation for untyped atomic instructions.Francisco Jerez2013-10-291-0/+2
* i965: Add SHADER_OPCODE_TG4_OFFSET for gather with nonconstant offsets.Chris Forbes2013-10-261-0/+1
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