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path: root/src/mesa/drivers/dri/i965/brw_vec4.cpp
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* i965: Plumb compiler debug logging through a function pointer in brw_compilerJason Ekstrand2015-06-231-2/+4
* i965: Create a shader_dispatch_mode enum to replace VS/GS fields.Kenneth Graunke2015-06-011-1/+4
* i965/vs: Rework the logic for generating NIR from ARB vertex programsJason Ekstrand2015-05-281-12/+11
* i965: Rename backend_visitor to backend_shaderJason Ekstrand2015-05-281-2/+2
* i965/fs: Combine the fs_visitor constructors.Kenneth Graunke2015-05-141-1/+2
* i965: Change header_present to header_size in backend_instructionJason Ekstrand2015-05-061-1/+1
* i965: Perform basic optimizations on the FIND_LIVE_CHANNEL opcode.Francisco Jerez2015-05-041-0/+41
* i965: Perform basic optimizations on the BROADCAST opcode.Francisco Jerez2015-05-041-0/+10
* i965: Add typed surface access opcodes.Francisco Jerez2015-05-041-0/+6
* i965: Add untyped surface write opcode.Francisco Jerez2015-05-041-0/+2
* i965/vec4: Add support for untyped surface message sends from GRF.Francisco Jerez2015-05-041-3/+4
* i965: Add brw_setup_tex_for_precompile. Use in VS, GS & FS.Jordan Justen2015-05-021-12/+1
* i965: Unhardcode a few more stage names and abbreviations.Kenneth Graunke2015-04-301-4/+2
* i965/vs: Remove unnecessary NULL check on generate_code() result.Kenneth Graunke2015-04-271-2/+1
* i965: Add a devinfo field to backend_visitor and use it for gen checksJason Ekstrand2015-04-221-11/+11
* i965: Create NIR during LinkShader() and ProgramStringNotify().Kenneth Graunke2015-04-111-3/+14
* i965: Check the INTEL_USE_NIR environment variable once at context creationJason Ekstrand2015-04-031-1/+3
* i965/nir: Use NIR for ARB_vertex_program support on Gen8+.Kenneth Graunke2015-03-271-4/+10
* i965: Drop unnecessary brw->gen >= 8 check from scalar VS code.Kenneth Graunke2015-03-251-1/+1
* i965/vec4: Define helpers to calculate the common live interval of a range of...Francisco Jerez2015-03-231-4/+2
* i965/vec4: Fix handling of multiple register reads and writes in split_virtua...Francisco Jerez2015-03-231-9/+6
* i965/vec4: Fix handling of multiple register reads and writes in opt_register...Francisco Jerez2015-03-231-14/+10
* i965/vec4: Some more trivial swizzle clean-up.Francisco Jerez2015-03-231-6/+2
* i965/vec4: Improve src_reg/dst_reg conversion constructors.Francisco Jerez2015-03-231-26/+2
* i965/vec4: Pass argument by reference to src_reg/dst_reg conversion construct...Francisco Jerez2015-03-231-2/+2
* i965/vec4: Remove swizzle_for_size() in favour of brw_swizzle_for_size().Francisco Jerez2015-03-231-21/+1
* i965/vec4: Simplify opt_register_coalesce() using the swizzle utils.Francisco Jerez2015-03-231-26/+7
* i965/vec4: Simplify reswizzle() using the swizzle utils.Francisco Jerez2015-03-231-29/+11
* i965/vec4: Simplify opt_reduce_swizzle() using the swizzle utils.Francisco Jerez2015-03-231-44/+7
* i965/vec4: Fix signedness of dst_reg::writemask.Francisco Jerez2015-03-231-1/+1
* i965/fs: Print spills:fills and number of promoted constants.Matt Turner2015-03-191-1/+2
* i965/vec4: Handle saturate in dump_instruction().Matt Turner2015-03-051-0/+2
* i965/vec4: Don't attempt to reduce swizzles of send from GRF instructions.Francisco Jerez2015-02-191-1/+2
* i965: Optimize multiplication by -1 into a negated MOV.Matt Turner2015-02-151-0/+5
* i965: Quiet another compiler warning about uninitialized values.Eric Anholt2015-02-121-2/+2
* i965/vec4: Don't set any dependency control bits for F32TO16 on Gen8.Francisco Jerez2015-02-101-0/+5
* i965/vec4: Init mlen for several send from GRF instructions.Francisco Jerez2015-02-101-1/+3
* i965/vec4: Fix the scheduler to take into account reads and writes of multipl...Francisco Jerez2015-02-101-0/+18
* i965/vec4: Make vec4_visitor::implied_mrf_writes() return zero for sends from...Francisco Jerez2015-02-101-1/+1
* i965/vec4: Implement equals() method for dst_reg too.Francisco Jerez2015-02-101-0/+16
* i965: Move up fs_inst::flag_subreg to backend_instruction.Francisco Jerez2015-02-101-2/+9
* i965: Factor out virtual GRF allocation to a separate object.Francisco Jerez2015-02-101-10/+10
* i965/vec4: Correct MUL destination hazardBen Widawsky2015-02-061-4/+4
* i965: Convert CMP.GE -(abs)reg 0 -> CMP.Z reg 0.Matt Turner2015-01-231-0/+12
* i965/vec4: Make sure that imm writes are to registers in the same file.Matt Turner2015-01-151-2/+8
* i965: Fix "vertex" vs. "geometry" and "VS" vs. "GS" in debug output.Kenneth Graunke2015-01-141-1/+1
* i965: Pass a shader stage abbreviation to fs_generator().Kenneth Graunke2015-01-141-1/+1
* i965: Make the precompile ignore DEPTH_TEXTURE_MODE on Gen7.5+.Kenneth Graunke2015-01-041-1/+3
* i965: Fix INTEL_DEBUG=optimizer with VF types.Kenneth Graunke2015-01-031-1/+1
* i965: Show opt_vector_float() and later passes in INTEL_DEBUG=optimizer.Kenneth Graunke2015-01-031-8/+12
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