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src
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mesa
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drivers
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dri
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i965
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brw_vec4.cpp
Commit message (
Expand
)
Author
Age
Files
Lines
*
i965: Pass devinfo pointer to is_3src() helpers.
Francisco Jerez
2016-05-03
1
-1
/
+1
*
i965: Pass devinfo pointer to brw_instruction_name().
Francisco Jerez
2016-05-03
1
-1
/
+1
*
i965: Properly handle integer types in opt_vector_float().
Kenneth Graunke
2016-04-20
1
-4
/
+18
*
i965: Make opt_vector_float() only handle non-type-conversion MOVs.
Kenneth Graunke
2016-04-20
1
-2
/
+5
*
i965: Fold vectorize_mov() back into the one caller.
Kenneth Graunke
2016-04-20
1
-24
/
+16
*
i965: Rework opt_vector_float() control flow.
Kenneth Graunke
2016-04-20
1
-27
/
+34
*
i965/vec4: Handle MOV_INDIRECT in pack_uniform_registers
Jason Ekstrand
2016-04-15
1
-0
/
+18
*
i965/vec4: Add support for SHADER_OPCODE_MOV_INDIRECT
Jason Ekstrand
2016-04-15
1
-0
/
+1
*
i965/vec4: Use can_do_writemask in can_reswizzle
Jason Ekstrand
2016-04-15
1
-3
/
+5
*
i965/vec4: Move can_do_writemask to vec4_instruction
Jason Ekstrand
2016-04-15
1
-0
/
+28
*
i965/vec4: Get rid of the uniform_size array
Jason Ekstrand
2016-04-14
1
-8
/
+0
*
i965/vec4: Use MOV_INDIRECT instead of reladdr for indirect push constants
Jason Ekstrand
2016-04-14
1
-1
/
+1
*
i965: Remove the RCP+RSQ algebraic optimizations
Jason Ekstrand
2016-03-22
1
-11
/
+0
*
i965/vec4: Consider removal of no-op MOVs as progress during register coalesce.
Francisco Jerez
2016-03-14
1
-0
/
+1
*
i965/vec4: add opportunistic behaviour to opt_vector_float()
Juan A. Suarez Romero
2016-03-04
1
-21
/
+39
*
i965: Eliminate brw_nir_lower_{inputs,outputs,io} functions.
Kenneth Graunke
2016-02-26
1
-3
/
+3
*
i965: Lower min/max after optimization on Gen4/5.
Matt Turner
2016-02-17
1
-0
/
+38
*
i965: Fix gl_DrawID in the vec4 backend.
Kenneth Graunke
2016-02-14
1
-5
/
+5
*
i965: Rename optimizer debug 00 filename
Ben Widawsky
2016-02-12
1
-1
/
+1
*
i965/vec4: Drop support for ATTR as an instruction destination.
Kenneth Graunke
2016-02-09
1
-16
/
+0
*
i965: Apply VS attribute workarounds in NIR.
Kenneth Graunke
2016-02-09
1
-0
/
+3
*
i965: Explicitly write the "TR DS Cache Disable" bit at TCS EOT.
Kenneth Graunke
2016-02-09
1
-1
/
+1
*
i965/fs/generator: Take an actual shader stage rather than a string
Jason Ekstrand
2016-01-15
1
-1
/
+1
*
i965: Make an is_scalar boolean in brw_compile_vs().
Kenneth Graunke
2016-01-14
1
-5
/
+5
*
i965: Move 3-src subnr swizzle handling into the vec4 backend.
Kenneth Graunke
2016-01-02
1
-0
/
+13
*
i965: Add support for gl_DrawIDARB and enable extension
Kristian Høgsberg Kristensen
2015-12-29
1
-1
/
+12
*
i965: Add support for gl_BaseVertexARB and gl_BaseInstanceARB
Kristian Høgsberg Kristensen
2015-12-29
1
-2
/
+5
*
i965: Don't set interleave or complete on TCS EOT message.
Kenneth Graunke
2015-12-28
1
-0
/
+1
*
i965: Relase input URB Handles on Gen7/7.5 when TCS threads finish.
Kenneth Graunke
2015-12-28
1
-0
/
+1
*
i965: Port tessellation evaluation shaders to vec4 mode.
Kenneth Graunke
2015-12-28
1
-0
/
+1
*
i965: Add tessellation control shaders.
Kenneth Graunke
2015-12-22
1
-1
/
+9
*
i965: Add src/dst interference for certain instructions with hazards.
Kenneth Graunke
2015-11-30
1
-0
/
+29
*
i965: Clean up #includes in the compiler.
Matt Turner
2015-11-24
1
-7
/
+0
*
i965: Prevent implicit upcasts to brw_reg.
Matt Turner
2015-11-24
1
-2
/
+3
*
i965: Use scope operator to ensure brw_reg is interpreted as a type.
Matt Turner
2015-11-24
1
-2
/
+2
*
i965: Use implicit backend_reg copy-constructor.
Matt Turner
2015-11-24
1
-4
/
+2
*
i965: Add and use backend_reg::equals().
Matt Turner
2015-11-24
1
-4
/
+2
*
i965: Use nir_lower_tex for texture coordinate lowering
Jason Ekstrand
2015-11-23
1
-0
/
+2
*
i965: Move postprocess_nir to codegen time
Jason Ekstrand
2015-11-23
1
-1
/
+5
*
i965: Drop IMM fs_reg/src_reg -> brw_reg conversions.
Matt Turner
2015-11-19
1
-5
/
+1
*
i965/vec4: Replace src_reg(imm) constructors with brw_imm_*().
Matt Turner
2015-11-19
1
-55
/
+12
*
i965: Convert scalar_* flags to a scalar_stage array.
Kenneth Graunke
2015-11-16
1
-2
/
+2
*
i965: Use BRW_MRF_COMPR4 macro in more places.
Matt Turner
2015-11-13
1
-1
/
+1
*
i965: Combine register file field.
Matt Turner
2015-11-13
1
-10
/
+6
*
i965: Replace HW_REG with ARF/FIXED_GRF.
Matt Turner
2015-11-13
1
-83
/
+58
*
i965: Rename GRF to VGRF.
Matt Turner
2015-11-13
1
-16
/
+16
*
i965: Use brw_reg's nr field to store register number.
Matt Turner
2015-11-13
1
-52
/
+48
*
i965: Unwrap some lines.
Matt Turner
2015-11-13
1
-4
/
+1
*
i965/vec4: Remove swizzle/writemask fields from src/dst_reg.
Matt Turner
2015-11-13
1
-2
/
+0
*
i965: Remove fixed_hw_reg field from backend_reg.
Matt Turner
2015-11-13
1
-63
/
+47
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