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path: root/src/mesa/drivers/dri/i965/brw_structs.h
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* i965: Cite the Ivybridge PRM for DP message descriptor fields.Kenneth Graunke2013-07-151-3/+3
* i965: Remove some dead code.Kenneth Graunke2013-07-031-31/+0
* i965: Add Gen7+ fields to brw_instruction and add comments.Matt Turner2013-05-061-12/+19
* i965: Replace structs with bit-shifting for Gen7 SURFACE_STATE entries.Kenneth Graunke2013-01-031-102/+0
* i965: Move BRW_MAX_GRF and similar defines to brw_reg.h.Kenneth Graunke2012-12-151-18/+0
* i965: Add the new flag_reg_nr instruction field from IVB.Eric Anholt2012-12-111-4/+8
* i965: Correct the name and usage of the flag subregister number field.Eric Anholt2012-12-111-5/+5
* i965: Remove bogus flag_reg_nr field from bits3.Eric Anholt2012-12-111-4/+2
* i965: Add support for instruction compaction.Eric Anholt2012-09-171-0/+26
* i965: Fix typo in shader channel select field name.Kenneth Graunke2012-07-271-4/+4
* i965/msaa: Add CMS MSAA settings to brw_structs.h.Paul Berry2012-07-111-2/+20
* i965: Set "Shader Channel Select" fields in Haswell's SURFACE_STATE.Kenneth Graunke2012-03-301-1/+8
* i965: Add support for the MAD opcode on gen6+.Eric Anholt2012-02-101-0/+37
* i965/fs: Fix rendering corruption in unigine tropics.Eric Anholt2012-01-301-0/+11
* i965: Replace a should-never-happen fallback with asserts where it matters.Eric Anholt2011-11-111-2/+0
* i965: Document most of the brw_instruction message structs.Kenneth Graunke2011-10-181-39/+79
* i965: Rename pixel_scoreboard_clear to last_render_target for clarity.Kenneth Graunke2011-10-181-4/+4
* i965: Document the brw_instruction Message Descriptor structures.Kenneth Graunke2011-10-181-2/+27
* i965: Remove unused structures for command packets.Kenneth Graunke2011-07-071-433/+0
* i965: Emit 3DSTATE_VF_STATISTICS in OUT_BATCH style.Kenneth Graunke2011-07-071-8/+0
* i965: Convert 3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP to OUT_BATCH style.Kenneth Graunke2011-07-071-9/+0
* i965: Remove brw_surface_state struct that is now unused.Eric Anholt2011-05-311-74/+0
* i965: Add support for IF/ELSE/ENDIF control flow on Ivybridge.Kenneth Graunke2011-05-171-0/+1
* i965: Fix sampler message descriptor on Ivybridge.Kenneth Graunke2011-05-171-0/+12
* i965: Fix SAMPLER_STATE on Ivybridge.Kenneth Graunke2011-05-171-0/+48
* i965: Update SURFACE_STATE for Ivybridge.Kenneth Graunke2011-05-171-0/+78
* i965: Fix the URB write message descriptor on Ivybridge.Kenneth Graunke2011-05-171-0/+14
* i965: Fix render target writes on Ivybridge.Kenneth Graunke2011-05-171-0/+16
* i965: Initial Ivybridge Viewport state setup.Kenneth Graunke2011-05-171-0/+22
* i965: Rename dp_render_target struct to gen6_dp.Kenneth Graunke2011-05-131-1/+1
* i965: Remove dead vertex buffer structs.Kenneth Graunke2011-04-201-25/+0
* i965: Convert 3DPRIMITIVE command from struct-style to OUT_BATCH style.Kenneth Graunke2011-04-181-19/+0
* i965: Add new HiZ related bits to WM_STATE.Kenneth Graunke2011-01-101-1/+8
* i965: Correct the dp_read message descriptor setup on g4x.Eric Anholt2010-12-231-0/+12
* i965: remove unused variable since brw_wm_glsl.c removal.Eric Anholt2010-12-091-1/+1
* i965: Set render_cache_read_write surface state bit on gen6 constant surfs.Eric Anholt2010-12-091-0/+5
* i965: Set up the correct texture border color state struct for Ironlake.Eric Anholt2010-12-091-0/+9
* i965: Add support for gen6 BREAK ISA emit.Eric Anholt2010-12-011-0/+15
* i965: Fix up IF/ELSE/ENDIF for gen6.Eric Anholt2010-10-061-0/+12
* i965: fix scissor state on sandybridgeZhenyu Wang2010-09-281-3/+5
* i965: Fix sampler on sandybridgeZhenyu Wang2010-09-281-6/+8
* i965: fix depth test on sandybridgeZhenyu Wang2010-08-311-1/+1
* i965: Set the destination horiz stride even for da16, as SNB seems to need it.Zhenyu Wang2010-08-201-2/+2
* i965: Add AccWrCtl support on Sandybridge.Zhenyu Wang2010-08-201-2/+3
* i965: Add disasm for SEND mlen/rlen on Sandybridge.Eric Anholt2010-07-081-2/+3
* i965: Add definitions for Sandybridge DP write/read messages.Zhenyu Wang2010-07-081-0/+28
* i965: Fix the name of aa_coverage_slope in the improved AA line params.Eric Anholt2010-06-181-1/+1
* intel: Clean up chipset name and gen num for IronlakeZhenyu Wang2010-04-211-9/+9
* i965: Add Sandybridge viewport setup.Eric Anholt2010-02-251-0/+9
* i965: Add Sandybridge scissor state.Eric Anholt2010-02-251-0/+5
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