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path: root/src/mesa/drivers/dri/i965/brw_shader.cpp
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* i965: Make bblock_t::next and friends return NULL at sentinels.Kenneth Graunke2016-04-041-1/+1
* i965: Assert that an instruction is not inserted around itself.Matt Turner2016-03-301-0/+4
* i965: Remove useless IR self-destruct backend_shader method.Francisco Jerez2016-03-131-7/+0
* i965: Avoid recalculating the tessellation VUE map for IO lowering.Kenneth Graunke2016-02-261-7/+8
* i965: Eliminate brw_nir_lower_{inputs,outputs,io} functions.Kenneth Graunke2016-02-261-1/+2
* glsl/types: Add support for function typesJason Ekstrand2016-02-131-0/+1
* i965: Apply VS attribute workarounds in NIR.Kenneth Graunke2016-02-091-1/+1
* i965/fs: Implement support for extract_word.Matt Turner2016-02-011-0/+4
* i965: Move brw_compiler_create() to new brw_compiler.c.Matt Turner2016-02-011-130/+0
* i965/fs/generator: Take an actual shader stage rather than a stringJason Ekstrand2016-01-151-1/+1
* nir: Lower bitfield_extract.Matt Turner2016-01-141-0/+1
* i965: Mark TCS URB writes as having side effects.Kenneth Graunke2016-01-121-0/+1
* glsl: Move _mesa_shader_stage_to_string/abbrev to shader_enums.cKristian Høgsberg Kristensen2016-01-081-1/+0
* i965/compiler: Enable more lowering in NIRJason Ekstrand2016-01-071-0/+7
* nir: Add a lower_fdiv option, turn fdiv into fmul/frcp.Kenneth Graunke2016-01-051-0/+1
* i965: Don't set interleave or complete on TCS EOT message.Kenneth Graunke2015-12-281-0/+2
* i965: Relase input URB Handles on Gen7/7.5 when TCS threads finish.Kenneth Graunke2015-12-281-0/+5
* i965: Port tessellation evaluation shaders to vec4 mode.Kenneth Graunke2015-12-281-2/+23
* i965: Handle mix-and-match TCS/TES with separate shader objects.Kenneth Graunke2015-12-221-0/+2
* i965: Defer input lowering for tessellation stages until specialization.Kenneth Graunke2015-12-221-0/+1
* i965: Add tessellation control shaders.Kenneth Graunke2015-12-221-0/+17
* i965: Add tessellation evaluation shadersKenneth Graunke2015-12-221-0/+94
* i965: Lower shared variable references to intrinsic callsJordan Justen2015-12-091-0/+3
* i965: Clean up #includes in the compiler.Matt Turner2015-11-241-6/+3
* i965: Mark functions called from C as extern "C".Matt Turner2015-11-241-2/+2
* i965: Add and use backend_reg::equals().Matt Turner2015-11-241-0/+7
* util: move brw_env_var_as_boolean() to utilRob Clark2015-11-241-1/+2
* i965/fs: Use brw_imm_uw().Matt Turner2015-11-191-6/+2
* i965: Allow indirect GS input indexing in the scalar backend.Kenneth Graunke2015-11-181-0/+3
* i965: Convert scalar_* flags to a scalar_stage array.Kenneth Graunke2015-11-161-22/+7
* i965: Introduce a MOV_INDIRECT opcode.Kenneth Graunke2015-11-141-0/+2
* i965: Add a SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT opcode.Kenneth Graunke2015-11-131-0/+2
* i965: Replace HW_REG with ARF/FIXED_GRF.Matt Turner2015-11-131-6/+2
* i965: Use brw_reg's nr field to store register number.Matt Turner2015-11-131-1/+1
* i965: Remove fixed_hw_reg field from backend_reg.Matt Turner2015-11-131-4/+4
* i965: Use immediate storage in inherited brw_reg.Matt Turner2015-11-131-5/+5
* i965: Make 'dw1' and 'bits' unnamed structures in brw_reg.Matt Turner2015-11-131-15/+15
* i965: Fill out instruction list.Matt Turner2015-11-121-1/+1
* i965: Consolidate is_3src() functions.Matt Turner2015-11-121-1/+1
* glsl: Lower UBO and SSBO access in glsl linkerKristian Høgsberg Kristensen2015-11-101-0/+2
* i965/fs/skl+: Use ld2dms_w instead of ld2dmsNeil Roberts2015-11-051-0/+5
* glsl: keep track of intra-stage indices for atomicsTimothy Arceri2015-10-271-2/+2
* i965/fs: Disable CSE optimization for untyped & typed surface readsJordan Justen2015-10-221-0/+14
* i965: Implement ARB_shader_stencil_export (gen9+)Ben Widawsky2015-10-211-0/+2
* i965: Add a brw->scalar_gs flag controlled by INTEL_SCALAR_GS=1.Kenneth Graunke2015-10-211-0/+5
* i965: Introduce a new SHADER_OPCODE_URB_READ_SIMD8 opcode.Kenneth Graunke2015-10-211-0/+2
* i965: Introduce new SHADER_OPCODE_URB_WRITE_SIMD8_MASKED/PER_SLOT opcodes.Kenneth Graunke2015-10-211-0/+9
* i965: Use a const nir_shader in backend_shaderJason Ekstrand2015-10-191-1/+1
* i965: Adapt SSBOs to work with their own separate index spaceIago Toral Quiroga2015-10-141-2/+7
* mesa: Rename {Num}UniformBlocks to {Num}BufferInterfaceBlocksIago Toral Quiroga2015-10-141-2/+2
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