summaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers/dri/i965/brw_shader.cpp
Commit message (Expand)AuthorAgeFilesLines
* i965/vec4: Drop backend_reg::in_range() in favor of regions_overlap().Francisco Jerez2016-09-141-9/+0
* i965/ir: Remove backend_reg::reg_offset.Francisco Jerez2016-09-141-2/+0
* i965/fs: Replace fs_reg::reg_offset with fs_reg::offset expressed in bytes.Francisco Jerez2016-09-141-2/+4
* intel: s/brw_device_info/gen_device_info/Jason Ekstrand2016-09-031-5/+5
* i965/fs: Define logical framebuffer read opcode and lower it to physical reads.Francisco Jerez2016-08-251-0/+2
* i965/fs: Define framebuffer read virtual opcode.Francisco Jerez2016-08-251-0/+2
* i965: Allocate space in the binding table for non-coherent FB fetch.Francisco Jerez2016-08-251-3/+4
* util: Move _mesa_fsl/util_last_bit into util/bitscan.hMathias Fröhlich2016-08-091-1/+1
* i965: Delete the FS_OPCODE_INTERPOLATE_AT_CENTROID virtual opcode.Kenneth Graunke2016-07-201-2/+0
* glsl/mesa: split gl_shader in twoTimothy Arceri2016-06-301-2/+2
* i965/fs: Add FS_OPCODE_FB_WRITE_LOGICAL to has_side_effects().Francisco Jerez2016-05-291-0/+1
* i965/fs: Remove FS_OPCODE_PACK_STENCIL_REF virtual instruction.Francisco Jerez2016-05-271-2/+0
* i965/fs: Remove extract virtual opcodes.Francisco Jerez2016-05-271-4/+0
* i965/fs: Handle SAMPLEINFO consistently like other texturing instructions.Francisco Jerez2016-05-271-0/+2
* i965/fs: Rename Gen4 physical varying pull constant load opcode.Francisco Jerez2016-05-271-2/+2
* i965/fs: Hide varying pull constant load message setup behind logical opcode.Francisco Jerez2016-05-271-0/+2
* i965: Move brw_new_shader to brw_link.cppJason Ekstrand2016-05-261-17/+0
* i965: Support textures with multiple planesKristian Høgsberg Kristensen2016-05-241-0/+9
* i965: Add infrastucture for sample lod-zero operations.Matt Turner2016-05-191-0/+6
* i965/blorp: Delete the old blorp shader emit codeJason Ekstrand2016-05-141-2/+0
* i965/fs: Stop setting dispatch_grf_start_reg from the visitorJason Ekstrand2016-05-141-0/+1
* i965: Fix undefined df bits in brw_reg comparisons.Kenneth Graunke2016-05-141-2/+1
* i965: Handle BRW_OPCODE_DO on Gen6+ in brw_instruction_name().Matt Turner2016-05-101-0/+6
* i965/fs: add PACK opcodeConnor Abbott2016-05-101-0/+2
* i965: fix brw_abs_immediate() for doublesIago Toral Quiroga2016-05-101-2/+4
* i965: fix brw_saturate_immediate() for doublesIago Toral Quiroga2016-05-101-6/+27
* i965: fix is_zero(), is_one() and is_negative_one() for doublesConnor Abbott2016-05-101-4/+24
* i965: fix brw_negate_immediate() for doublesConnor Abbott2016-05-101-2/+4
* i965: Tell backend register about double precision typeTopi Pohjolainen2016-05-101-1/+2
* i965: Rework passthrough TCS checks.Kenneth Graunke2016-05-051-0/+2
* i965/disasm: Wrap opcode_desc look-up in a function.Francisco Jerez2016-05-031-2/+2
* i965: Pass devinfo pointer to is_3src() helpers.Francisco Jerez2016-05-031-2/+2
* i965: Pass devinfo pointer to brw_instruction_name().Francisco Jerez2016-05-031-1/+1
* i965/fs: Properly report regs_written from SAMPLEINFOJason Ekstrand2016-04-261-1/+2
* i965: Mark URB reads as volatile.Kenneth Graunke2016-04-251-0/+3
* i965: Make a few tessellation related functions non-static.Kenneth Graunke2016-04-251-0/+47
* i965: Make bblock_t::next and friends return NULL at sentinels.Kenneth Graunke2016-04-041-1/+1
* i965: Assert that an instruction is not inserted around itself.Matt Turner2016-03-301-0/+4
* i965: Remove useless IR self-destruct backend_shader method.Francisco Jerez2016-03-131-7/+0
* i965: Avoid recalculating the tessellation VUE map for IO lowering.Kenneth Graunke2016-02-261-7/+8
* i965: Eliminate brw_nir_lower_{inputs,outputs,io} functions.Kenneth Graunke2016-02-261-1/+2
* glsl/types: Add support for function typesJason Ekstrand2016-02-131-0/+1
* i965: Apply VS attribute workarounds in NIR.Kenneth Graunke2016-02-091-1/+1
* i965/fs: Implement support for extract_word.Matt Turner2016-02-011-0/+4
* i965: Move brw_compiler_create() to new brw_compiler.c.Matt Turner2016-02-011-130/+0
* i965/fs/generator: Take an actual shader stage rather than a stringJason Ekstrand2016-01-151-1/+1
* nir: Lower bitfield_extract.Matt Turner2016-01-141-0/+1
* i965: Mark TCS URB writes as having side effects.Kenneth Graunke2016-01-121-0/+1
* glsl: Move _mesa_shader_stage_to_string/abbrev to shader_enums.cKristian Høgsberg Kristensen2016-01-081-1/+0
* i965/compiler: Enable more lowering in NIRJason Ekstrand2016-01-071-0/+7
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-19 07:26:10 +0000