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path: root/src/mesa/drivers/dri/i965/brw_reg.h
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* i965: Add support for constant evaluation on Q and UQ typesIan Romanick2017-01-201-0/+1
* i965: Replace reg_type_size[] with a function.Matt Turner2017-01-201-0/+8
* i965/vec4/scalarize_df: support more swizzles via vstride=0Iago Toral Quiroga2017-01-031-0/+2
* i965/vec4/scalarize_df: do not scalarize swizzles that we can support nativelyIago Toral Quiroga2017-01-031-0/+3
* i965: add brw_vecn_grf()Connor Abbott2017-01-031-0/+6
* i965: fix subnr overflow in suboffset()Iago Toral Quiroga2016-10-191-8/+5
* i965/fs: Take Dispatch/Vector mask into account in FIND_LIVE_CHANNELJason Ekstrand2016-09-211-0/+12
* i965/reg: Make brw_sr0_reg take a subnr and return a vec1 regJason Ekstrand2016-09-211-12/+8
* intel: s/brw_device_info/gen_device_info/Jason Ekstrand2016-09-031-2/+2
* i965: add helper for creating packing writemaskTimothy Arceri2016-07-211-0/+7
* i965: add helpers for creating component layout swizzleTimothy Arceri2016-07-211-0/+3
* i965: Add missing types to type_sz().Matt Turner2016-06-021-1/+5
* i965: Define brw_int_type() helper.Francisco Jerez2016-05-271-0/+20
* i965: Fix brw_regs_equal() for NaN and positive/negative zero.Kenneth Graunke2016-05-201-1/+2
* i965: Fix undefined df bits in brw_reg comparisons.Kenneth Graunke2016-05-141-8/+19
* i965: add brw_imm_dfConnor Abbott2016-05-101-0/+9
* i965: Determine size of double precision float registerTopi Pohjolainen2016-05-101-0/+1
* i965/hsw: Initialize SLM index in state registerJordan Justen2016-03-081-0/+16
* i965: Add support for swizzling arbitrary immediates to (brw_)swizzle().Francisco Jerez2016-03-061-2/+5
* i965: Pass symbolic swizzle to brw_swizzle() as a single argument.Francisco Jerez2016-03-061-11/+4
* i965/gen8: Always use BRW_REGISTER_TYPE_UW for MUL on GEN8+Marta Lofstedt2015-12-301-27/+0
* i965: Add tessellation control shaders.Kenneth Graunke2015-12-221-0/+1
* i965: Add brw_imm_uv().Matt Turner2015-11-201-0/+9
* i965: Don't bother setting regioning on immediates.Matt Turner2015-11-201-6/+0
* i965: Make brw_imm_vf4() take 8-bit restricted floats.Matt Turner2015-11-191-31/+7
* i965: Combine register file field.Matt Turner2015-11-131-2/+2
* i965: Use brw_reg's nr field to store register number.Matt Turner2015-11-131-5/+5
* i965: Add and use enum brw_reg_file.Matt Turner2015-11-131-12/+13
* i965: Reorganize brw_reg fields.Matt Turner2015-11-131-8/+8
* i965: Make 'dw1' and 'bits' unnamed structures in brw_reg.Matt Turner2015-11-131-20/+20
* i965/brw_reg: Add a brw_VxH_indirect helperJason Ekstrand2015-11-111-0/+11
* i965: Note that the UV immediate type is Gen6+.Matt Turner2015-10-221-1/+1
* i965: Turn BRW_MAX_MRF into a macro that accepts a hardware generationIago Toral Quiroga2015-09-211-1/+1
* i965: Move MRF register asserts out of brw_reg.hIago Toral Quiroga2015-09-211-3/+4
* i965/vec4: Add auxiliary func to build a writemask from a component sizeEduardo Lima Mitev2015-08-031-0/+6
* Delete duplicate function is_power_of_two() and use _mesa_is_pow_two()Anuj Phogat2015-07-291-1/+1
* i965: Add notification registerJordan Justen2015-06-121-0/+16
* i965: Document brw_mask_reg().Francisco Jerez2015-05-121-1/+5
* i965: Make the brw_inst helpers take a device_info instead of a contextJason Ekstrand2015-04-221-2/+2
* i965/fs: Calculate delta_x and delta_y together.Matt Turner2015-04-211-0/+7
* i965: Make type_sz() return unsigned.Matt Turner2015-04-211-1/+1
* i965/vec4: Some more trivial swizzle clean-up.Francisco Jerez2015-03-231-4/+2
* i965/vec4: Fix signedness of brw_is_single_value_swizzle() argument.Francisco Jerez2015-03-231-1/+1
* i965: Define some useful swizzle helper functions.Francisco Jerez2015-03-231-0/+97
* i965/fs: Replace ud_reg_to_w() with a more general helper function.Francisco Jerez2015-02-191-0/+22
* i965: Extract scalar region checking logicBen Widawsky2015-01-201-0/+13
* i965: Add QWORD sizes to type_sz macroBen Widawsky2015-01-201-0/+3
* i965/brw_reg: struct constructor now needs explicit negate and abs values.Andres Gomez2014-12-151-2/+20
* i965: Add functions to convert float <-> VF.Matt Turner2014-11-251-0/+4
* i965/brw_reg: Make the accumulator register take an explicit width.Jason Ekstrand2014-09-301-2/+3
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