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path: root/src/mesa/drivers/dri/i965/brw_misc_state.c
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* i965: Move has_hiz from the slice to the level.Eric Anholt2014-05-121-1/+1
* i965: Delete the intel_regions.c code.Eric Anholt2014-05-011-1/+0
* i965: Drop use of intel_region from miptrees.Eric Anholt2014-05-011-14/+12
* i965: Move intel_region_get_aligned_offset() to be a miptree function.Eric Anholt2014-05-011-9/+8
* i965: Move intel_region_get_tile_masks() to be a miptree function.Eric Anholt2014-05-011-7/+7
* i965: Actually emit PIPELINE_SELECT and 3DSTATE_VF_STATISTICS.Kenneth Graunke2014-05-011-2/+8
* i965: Fix render-to-texture in non-FinishRenderTexture cases.Eric Anholt2014-03-061-0/+5
* i965: Pull format conversion logic out of brw_depthbuffer_format.Kenneth Graunke2014-02-191-32/+1
* mesa: Fix MESA_FORMAT_Z24_UNORM_S8_UINT vs. X8_UINT mix-up.Kenneth Graunke2014-02-091-3/+3
* mesa: Change many Type P MESA_FORMATs to meet naming specMark Mueller2014-01-271-5/+5
* mesa: Change many Type A MESA_FORMATs to meet naming standardMark Mueller2014-01-271-5/+5
* i965: Update invariant state for Broadwell.Kenneth Graunke2014-01-181-4/+12
* i965: Remove CACHED_BATCH support altogether.Kenneth Graunke2014-01-171-4/+5
* s/Tungsten Graphics/VMware/José Fonseca2014-01-171-2/+2
* i965: Drop trailing whitespace from the rest of the driver.Kenneth Graunke2013-12-051-11/+11
* i965: Use has_surface_tile_offset in depth/stencil alignment workaround.Kenneth Graunke2013-11-071-2/+2
* i965: Emit post-sync non-zero flush before 3DSTATE_DRAWING_RECTANGLE.Kenneth Graunke2013-10-281-0/+4
* i965: Remove has_aa_line_parameters.Kenneth Graunke2013-10-131-1/+5
* i965: Move binding table code to a new file, brw_binding_tables.c.Kenneth Graunke2013-09-191-66/+0
* i965: Use brw_stage_state for WM data as well.Kenneth Graunke2013-09-131-3/+3
* i965: Move data from brw->vs into a base class if gs will also need it.Paul Berry2013-08-311-3/+3
* i965: rename legacy gs structs and functions to ff_gs.Paul Berry2013-08-311-5/+5
* i965/gen7: Set MOCS L3 cacheability for IVB/BYT (v2)Ville Syrjälä2013-08-211-1/+1
* i965/hsw: Populate MOCS for STATE_BASE_ADDRESS (v2)Ville Syrjälä2013-08-211-2/+5
* gen7 depth surface: program 3DSTATE_DEPTH_BUFFER to top of surfaceJordan Justen2013-08-041-0/+6
* i965: init global state first in brw_workaround_depthstencil_alignmentJordan Justen2013-08-041-5/+14
* i965: Delete intel_context entirely.Kenneth Graunke2013-07-091-12/+8
* i965: Move intel_context::gen and gt fields to brw_context.Kenneth Graunke2013-07-091-37/+25
* i965: Move intel_context::is_<platform> flags to brw_context.Kenneth Graunke2013-07-091-4/+4
* i965: Move must_use/has_separate_stencil fields to brw_context.Kenneth Graunke2013-07-091-1/+1
* i965: Shorten context base class dereference chains.Kenneth Graunke2013-07-091-1/+1
* i965: Move intel_context::batch to brw_context.Kenneth Graunke2013-07-091-10/+10
* i965: Move intel_context::vtbl to brw_context.Kenneth Graunke2013-07-091-4/+4
* i965: Pass brw_context to functions rather than intel_context.Kenneth Graunke2013-07-091-17/+12
* i965: NULL check depth_mt to quiet static analysis.Matt Turner2013-06-291-1/+1
* i965: Emit invariant state once at startup on Gen6+.Kenneth Graunke2013-06-101-2/+3
* i965: Kill software primitive counting entirely.Kenneth Graunke2013-05-211-13/+0
* i965/gen7: fix 3DSTATE_LINE_STIPPLE_PATTERNChia-I Wu2013-04-241-3/+14
* i965: Fix an unused variable warning in the release build.Eric Anholt2013-04-121-4/+2
* i965: Remove brw_context::depthstencil::hiz_mtChad Versace2013-04-101-2/+0
* intel: Replace checks for hiz_mt with intel_has*hiz()Chad Versace2013-04-101-16/+16
* i965: Change signature of brw_get_depthstencil_tile_masks()Chad Versace2013-04-101-1/+6
* i965: Reduce code duplication in handling of depth, stencil, and HiZ.Paul Berry2013-04-021-89/+106
* i965: Avoid unnecessary copy when depthstencil workaround invoked by clear.Paul Berry2013-03-191-5/+26
* intel: Make intel_region's pitch be bytes instead of pixels.Eric Anholt2013-01-181-3/+3
* i965: Add perf debug for depth/stencil alignment workaround.Eric Anholt2012-12-221-0/+16
* i965/gen4-5: Fix segfaults with stencil-only depth/stencil setups.Eric Anholt2012-11-281-1/+3
* i965: Use the separate stencil buffer's offsets for stencil setup.Eric Anholt2012-11-191-15/+38
* i965: Move all the depth/stencil/hiz offset logic into the workaround.Eric Anholt2012-11-191-108/+113
* i965: When rebasing depth or stencil, update x/y before deciding the other.Eric Anholt2012-11-191-13/+36
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