aboutsummaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
Commit message (Expand)AuthorAgeFilesLines
* i965: Use typed foreach_in_list instead of foreach_list.Matt Turner2014-07-011-18/+6
* i965/fs: Loop from 0 to inst->sources, not 0 to 3.Matt Turner2014-06-011-3/+3
* i965: Give dump_instructions() a filename argument.Matt Turner2014-06-011-1/+1
* i965/fs: Move payload register info from brw_wm_compile to fs_visitor.Kenneth Graunke2014-05-181-3/+3
* i965/fs: Move c->last_scratch into fs_visitor.Kenneth Graunke2014-05-181-2/+2
* i965: Allocate register sets at screen creation, not context creation.Kenneth Graunke2014-03-181-23/+25
* i965/fs: Remove fs_reg::smear.Francisco Jerez2014-02-121-2/+2
* i965/fs: Add support for specifying register horizontal strides.Francisco Jerez2014-02-121-2/+2
* i965/fs: Add support for sub-register byte offsets to the FS back-end IR.Francisco Jerez2014-02-121-11/+9
* i965/fs: Add and use MAX_SAMPLER_MESSAGE_SIZE definition.Matt Turner2014-01-211-1/+2
* i965: Replace 8-wide and 16-wide with SIMD8 and SIMD16.Eric Anholt2014-01-171-4/+4
* i965/fs: Try a different pre-scheduling heuristic if the first spills.Eric Anholt2013-11-121-7/+3
* i965/fs: Use the gen7 scratch read opcode when possible.Eric Anholt2013-10-301-3/+12
* i965: Merge together opcodes for SHADER_OPCODE_GEN4_SCRATCH_READ/WRITEEric Anholt2013-10-301-5/+7
* i965/fs: Fix register unspills from a reg_offset.Eric Anholt2013-10-301-3/+3
* i965/fs: Fix register spilling for 16-wide.Eric Anholt2013-10-301-10/+9
* i965/fs: Exit the compile if spilling would overwrite in-use MRFs.Eric Anholt2013-10-301-0/+22
* i965/fs: Fix broken register spilling debug code.Eric Anholt2013-10-301-0/+11
* i965/fs: Split "find what MRFs were used" to a helper function.Eric Anholt2013-10-301-9/+24
* i965/fs: Convert gen7 to using GRFs for texture messages.Eric Anholt2013-10-101-20/+27
* i965/fs: Allocate more register classes on gen7.Eric Anholt2013-10-101-15/+26
* i965/fs: Create a helper function for invalidating live intervals.Kenneth Graunke2013-10-101-1/+1
* i965: Move intel_context::gen and gt fields to brw_context.Kenneth Graunke2013-07-091-6/+5
* i965/fs: Dump IR when fatally not compiling due to bad register spilling.Eric Anholt2013-06-261-1/+2
* glsl: Remove ir_print_visitor.h includes and usageEric Anholt2013-06-211-1/+0
* i965/fs: Make virtual grf live intervals actually cover their used range.Eric Anholt2013-05-091-2/+1
* i965: Share the register file enum between the two backends.Eric Anholt2013-05-021-2/+2
* i965: Ask the register allocator to round-robin through registers.Eric Anholt2013-04-041-0/+2
* i965/fs: Bake regs_written into the IR instead of recomputing it later.Eric Anholt2013-04-011-4/+4
* i965/fs: Add a comment about about an implementation detail.Eric Anholt2013-03-111-0/+4
* i965/fs: Rewrite discards to use a flag subreg to track discarded pixels.Eric Anholt2012-12-111-3/+0
* i965/fs: Move brw_wm_compile::dispatch_width into fs_visitor.Kenneth Graunke2012-11-261-5/+5
* i965/gen4: Fix LOD bias texturing since my fixed reg classes change.Eric Anholt2012-11-251-10/+18
* i965/fs: Fix typo in refactor of brw_fs_reg_allocate.cpp.Eric Anholt2012-10-191-1/+1
* i965/fs: Statically allocate the reg_sets at context initialization.Eric Anholt2012-10-171-27/+35
* i965/fs: Allocate registers in the unused parts of the gen7 MRF hack range.Eric Anholt2012-10-171-1/+61
* i965/fs: Reduce the interference between payload regs and virtual GRFs.Eric Anholt2012-10-171-19/+150
* i965/fs: Expose the payload registers to the register allocator.Eric Anholt2012-10-171-7/+39
* i965/fs: Remove extra allocation for classes[].Eric Anholt2012-10-171-1/+1
* i965/fs: Make the register allocation class_sizes[] choice static.Eric Anholt2012-10-171-60/+41
* i965: Share the predicate field between FS and VS.Eric Anholt2012-10-171-1/+1
* i965: Don't spill "smeared" registers.Paul Berry2012-09-251-0/+15
* ra: Add q_values parameter to ra_set_finalize()Tom Stellard2012-09-191-1/+1
* i965: Add INTEL_DEBUG=perf for failure to compile 16-wide shaders.Eric Anholt2012-08-121-1/+2
* i965/fs: Make register spill/unspill only do the regs for that instruction.Eric Anholt2012-07-181-33/+33
* i965/fs: Rename virtual_grf_next to virtual_grf_count.Eric Anholt2012-07-181-12/+12
* i965/fs: Enable register spilling on gen7 too.Eric Anholt2012-02-141-2/+0
* i965/fs: Add missing register allocation for 3rd sources.Eric Anholt2012-02-101-0/+2
* i965/fs: Fix rendering corruption in unigine tropics.Eric Anholt2012-01-301-3/+3
* mesa: Make the register allocator allocation take a ralloc context.Eric Anholt2012-01-181-1/+1
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-29 10:23:12 +0000