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path: root/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
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* i965/fs: Implement FS_OPCODE_GET_BUFFER_SIZESamuel Iglesias Gonsalvez2015-09-251-0/+47
* i965: Turn BRW_MAX_MRF into a macro that accepts a hardware generationIago Toral Quiroga2015-09-211-6/+6
* i965: Move MRF register asserts out of brw_reg.hIago Toral Quiroga2015-09-211-1/+4
* i965: Maximum allowed size of SEND messages is 15 (4 bits)Iago Toral Quiroga2015-09-211-0/+2
* i965: add support for textureSamples functionIlia Mirkin2015-09-101-0/+4
* i965: Lift the constness restriction on surface indices passed to untyped ops.Francisco Jerez2015-07-291-6/+2
* i965/fs: Use exec_size instead of dispatch_width to determine the message var...Francisco Jerez2015-07-291-4/+4
* i965/fs: Remove the FS_OPCODE_SET_OMASK pseudo-opcode.Francisco Jerez2015-07-291-35/+0
* i965/fs: Honour the instruction force_sechalf and exec_size fields for FB wri...Francisco Jerez2015-07-291-2/+2
* i965/fs: Fix stride for immediate registers.Francisco Jerez2015-07-211-0/+4
* i965/fs: Factor out universally broken calculation of the register component ...Francisco Jerez2015-07-161-1/+1
* i965/gen4-5: Program the execution size correctly for DO/WHILE instructions.Francisco Jerez2015-07-071-1/+1
* i965/fs_generator: Use inst->exec_size for determining hardware reg widthsJason Ekstrand2015-06-301-7/+7
* i965/fs: Actually set/use the mlen for gen7 uniform pull constant loadsJason Ekstrand2015-06-301-6/+3
* i965: Remove the dependance on brw_context from the generatorsJason Ekstrand2015-06-231-2/+3
* i965: Plumb compiler debug logging through a function pointer in brw_compilerJason Ekstrand2015-06-231-11/+9
* i965/fs: Implement support for ir_barrierJordan Justen2015-06-121-0/+11
* i965: Use UW-typed immediate in multiply inst.Matt Turner2015-06-031-1/+1
* i965: Don't add base_binding_table_index if it's zeroNeil Roberts2015-05-311-1/+2
* i965: Don't use a temporary when generating an indirect sampleNeil Roberts2015-05-311-13/+4
* i965/fs: Rework compression control selection.Matt Turner2015-05-181-3/+6
* i965/fs: set execution size to 8 with simd8 ddy instructionTapani Pälli2015-05-131-0/+1
* i965: Change header_present to header_size in backend_instructionJason Ekstrand2015-05-061-10/+10
* i965: Introduce the FIND_LIVE_CHANNEL pseudo-opcode.Francisco Jerez2015-05-041-0/+4
* i965: Introduce the BROADCAST pseudo-opcode.Francisco Jerez2015-05-041-0/+4
* i965: Add memory fence opcode.Francisco Jerez2015-05-041-0/+4
* i965: Add typed surface access opcodes.Francisco Jerez2015-05-041-0/+17
* i965: Add untyped surface write opcode.Francisco Jerez2015-05-041-0/+6
* i965: Reorder sources of the untyped atomic opcode.Francisco Jerez2015-05-041-2/+2
* i965: Pass the number of components as a source of the untyped surface read o...Francisco Jerez2015-05-041-2/+3
* i965: Don't request untyped atomic writeback message if the destination is null.Francisco Jerez2015-05-041-1/+1
* i965: Simplify generator code for untyped surface messages.Francisco Jerez2015-05-041-33/+9
* i965: Fix the untyped surface opcodes to deal with indirect surface access.Francisco Jerez2015-05-041-2/+2
* i965/cs: Add generator support for CS_OPCODE_CS_TERMINATEJordan Justen2015-05-021-0/+35
* i965/skl: Force the exec size to 8 when initing header for SIMD4x2Neil Roberts2015-05-011-0/+1
* i965: Rename brw_compile to brw_codegenJason Ekstrand2015-04-221-2/+2
* i965/fs: Add a devinfo field to the generator and use it for gen checksJason Ekstrand2015-04-221-59/+57
* i965/device_info: Add a supports_simd16_3src flagJason Ekstrand2015-04-221-19/+6
* i965: Make the annotation code take a device_info instead of a contextJason Ekstrand2015-04-221-2/+3
* i965/fs: Remove the GL context from the generatorJason Ekstrand2015-04-221-10/+1
* i965: Remove the context field from brw_compilerJason Ekstrand2015-04-221-1/+1
* i965: Make the brw_inst helpers take a device_info instead of a contextJason Ekstrand2015-04-221-27/+27
* i965/fs: Combine pixel center calculation into one inst.Matt Turner2015-04-211-0/+10
* i965/fs: Calculate delta_x and delta_y together.Matt Turner2015-04-211-3/+22
* i965/fs: Emit ADDs for gl_FragCoord, not virtual opcodes.Matt Turner2015-04-211-40/+0
* i965/fs: Set compression only if writing two registers.Matt Turner2015-04-211-1/+4
* i965/fs: Allow an execution size of 32.Matt Turner2015-04-211-0/+1
* i965: Replace guess_execution_size with something simpler.Matt Turner2015-04-211-4/+18
* i965/fs: Ensure delta_x/y are even-aligned registers on Gen6.Matt Turner2015-04-211-1/+1
* i965/fs: Combine tex/fb_write operations (opt)Ben Widawsky2015-04-141-0/+11
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