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path: root/src/mesa/drivers/dri/i965/brw_fs.cpp
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* i965: rename tex_ms to tex_cmsTopi Pohjolainen2014-01-231-1/+1
* i965: Ignore 'centroid' interpolation qualifier in case of persample shadingAnuj Phogat2014-01-211-1/+1
* i965: Use sample barycentric coordinates with per sample shadingAnuj Phogat2014-01-211-3/+10
* i965/fs: Optimize LRP with x == y into a MOV.Matt Turner2014-01-211-0/+10
* i965/fs: Print the maximum register pressure.Matt Turner2014-01-211-1/+3
* i965/fs: Show register pressure in dump_instructions() output.Kenneth Graunke2014-01-211-0/+14
* i965: Compute the number of live registers at each IP.Kenneth Graunke2014-01-211-0/+18
* i965/fs: Call opt_peephole_sel later in the optimization loop.Matt Turner2014-01-211-1/+1
* i965/fs: Calculate interference better in register_coalesce.Matt Turner2014-01-211-7/+72
* i965/fs: Support coalescing registers of size > 1.Matt Turner2014-01-211-23/+59
* i965/fs: Add a comment explaining how register coalescing works.Matt Turner2014-01-211-0/+12
* i965: Print reg_offset for vgrf of size > 1 in dump_instruction().Matt Turner2014-01-211-3/+3
* i965: Create a new fragment shader backend for Broadwell.Kenneth Graunke2014-01-181-5/+11
* i965: Replace 8-wide and 16-wide with SIMD8 and SIMD16.Eric Anholt2014-01-171-15/+15
* i965: Stop doing our optimization on a copy of the GLSL IR.Eric Anholt2014-01-171-2/+2
* i965/fs: add support for gl_SampleMaskIn[]Chris Forbes2013-12-141-1/+22
* glsl: move variables in to ir_variable::data, part IITapani Pälli2013-12-121-1/+1
* glsl: move variables in to ir_variable::data, part ITapani Pälli2013-12-121-4/+4
* glsl: introduce data section to ir_variableTapani Pälli2013-12-121-2/+2
* i965: Add shader opcode for sampling MCS surfaceChris Forbes2013-12-071-0/+1
* i965/fs: New peephole optimization to flatten IF/BREAK/ENDIF.Matt Turner2013-12-041-0/+1
* i965/fs: New peephole optimization to generate SEL.Matt Turner2013-12-041-0/+1
* i965/fs: Add SEL() convenience function.Matt Turner2013-12-041-0/+1
* i965: Print conditional mod in dump_instruction().Matt Turner2013-12-041-1/+1
* i965: Print argument types in dump_instruction().Matt Turner2013-12-041-1/+5
* i965/fs: Print ARF registers properly in dump_instruction().Matt Turner2013-12-041-2/+46
* i965: Don't print extra (null) arguments in dump_instruction().Matt Turner2013-12-041-2/+2
* i965/fs: Rename register_coalesce_2() -> register_coalesce().Matt Turner2013-12-041-5/+5
* i965/fs: Remove now useless register_coalesce() pass.Matt Turner2013-12-041-147/+0
* i965/fs: Let register_coalesce_2() eliminate self-moves.Matt Turner2013-12-041-1/+2
* i965: Always reserve binding table space for at least one render target.Kenneth Graunke2013-11-271-1/+4
* i965/fs: Fix misleading comment.Francisco Jerez2013-11-261-1/+1
* i965/fs: Make the first pre-allocation heuristic be the post heuristic.Eric Anholt2013-11-221-21/+41
* i965: Add a pass to remove dead control flow.Matt Turner2013-11-201-0/+2
* i965/fs: Use source's original type in register_coalesce().Matt Turner2013-11-201-0/+1
* i965/fs: Remove force_sechalf stackKenneth Graunke2013-11-161-14/+0
* i965: Assert that IF with cmod is Gen6 only.Matt Turner2013-11-151-2/+2
* i965/fs: Try a different pre-scheduling heuristic if the first spills.Eric Anholt2013-11-121-6/+19
* i965/fs: Do instruction pre-scheduling just before register allocation.Eric Anholt2013-11-121-2/+2
* i965/fs: Gen4-5: Implement alpha test in shader for MRTChris Forbes2013-11-061-0/+3
* i965/fs: Gen4-5: Setup discard masks for MRT alpha testChris Forbes2013-11-061-1/+1
* i965: Add a 'has_side_effects' back-end instruction predicate.Francisco Jerez2013-11-041-15/+10
* i965: Add FS backend for builtin gl_SampleIDAnuj Phogat2013-11-011-0/+48
* i965: Add FS backend for builtin gl_SamplePositionAnuj Phogat2013-11-011-0/+79
* i965/fs: Optimize saturating SEL.G(E) with imm val <= 0.0f.Matt Turner2013-11-011-0/+14
* i965/fs: Optimize saturating SEL.L(E) with imm val >= 1.0.Matt Turner2013-11-011-0/+22
* i965/fs: Optimize OR with identical sources into a MOV.Matt Turner2013-11-011-0/+8
* i965/fs: Add reads_flag() and writes_flag() to fs_inst.Matt Turner2013-10-301-0/+13
* i965/fs: Add is_null() method to fs_reg.Matt Turner2013-10-301-0/+8
* i965: Merge together opcodes for SHADER_OPCODE_GEN4_SCRATCH_READ/WRITEEric Anholt2013-10-301-2/+2