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path: root/src/mesa/drivers/dri/i965/brw_fs.cpp
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* i965/fs: Use UD type for offsets in VARYING_PULL_CONSTANT_LOADJason Ekstrand2016-04-141-1/+1
* i965/fs: Add a flat_inputs field to prog_dataJason Ekstrand2016-04-061-0/+31
* i965/fs: Make the repclear shader support either a uniform or a flat inputJason Ekstrand2016-04-061-5/+18
* i965: Remove the RCP+RSQ algebraic optimizationsJason Ekstrand2016-03-221-11/+0
* i965/nir: Lower nir compute shader shared variablesJordan Justen2016-03-171-0/+2
* i965/fs: Add missing analysis invalidation in fixup_3src_null_dest().Francisco Jerez2016-03-141-0/+6
* i965/fs: Add missing analysis invalidation in opt_sampler_eot().Francisco Jerez2016-03-141-1/+4
* i965/hsw: Initialize SLM index in state registerJordan Justen2016-03-081-0/+7
* i965/compute: Skip SIMD8 generation if it can't be usedJordan Justen2016-03-081-8/+12
* i965/fs: Allow spilling for SIMD16 compute shadersJordan Justen2016-03-081-1/+1
* i965: Eliminate brw_nir_lower_{inputs,outputs,io} functions.Kenneth Graunke2016-02-261-1/+2
* i965/nir: Do lower_io late for fragment shadersJason Ekstrand2016-02-261-0/+1
* i965: Lower min/max after optimization on Gen4/5.Matt Turner2016-02-171-0/+37
* glsl/types: Add support for function typesJason Ekstrand2016-02-131-0/+1
* i965: Rename optimizer debug 00 filenameBen Widawsky2016-02-121-1/+1
* i965/fs: Pass usage of depth, W, and sample mask through prog_dataJason Ekstrand2016-02-111-5/+10
* i965/fs: Refactor setup_payload_gen6 to assume FSJason Ekstrand2016-02-111-12/+12
* i965: ir: dump floats as %-g rather than %f, so we can see denormalsChris Forbes2016-02-111-1/+1
* i965/fs: Plumb separate surfaces and samplers through from NIRJason Ekstrand2016-02-091-10/+19
* i965/fs: Add an enum for keeping track of texture instruciton sourcesJason Ekstrand2016-02-091-21/+25
* nir: move glsl_types.{cpp,h} to compilerEmil Velikov2016-01-261-1/+1
* i965/fs: Remove unused count from vs urb setupBen Widawsky2016-01-221-6/+0
* i965/fs/generator: Take an actual shader stage rather than a stringJason Ekstrand2016-01-151-2/+4
* i965/gen8: Always use BRW_REGISTER_TYPE_UW for MUL on GEN8+Marta Lofstedt2015-12-301-2/+1
* i965: Add support for gl_DrawIDARB and enable extensionKristian Høgsberg Kristensen2015-12-291-0/+2
* i965: Add support for gl_BaseVertexARB and gl_BaseInstanceARBKristian Høgsberg Kristensen2015-12-291-1/+2
* i965: Add tessellation evaluation shadersKenneth Graunke2015-12-221-0/+49
* i965: Move brw_cs_fill_local_id_payload() to libi965_compilerKristian Høgsberg Kristensen2015-12-111-0/+36
* i965: Make uniform offsets be in terms of bytesJason Ekstrand2015-12-071-3/+1
* i965/fs: Use a stride of 1 and byte offsets for UBOsJason Ekstrand2015-12-071-8/+8
* i965: Add src/dst interference for certain instructions with hazards.Kenneth Graunke2015-11-301-0/+65
* i965: Fix fragment shader struct inputs.Kenneth Graunke2015-11-251-78/+79
* i965: Clean up #includes in the compiler.Matt Turner2015-11-241-13/+0
* i965: Compile brw_cs_fill_local_id_payload() as C.Matt Turner2015-11-241-36/+0
* i965: Push down inclusion of brw_program.h.Matt Turner2015-11-241-0/+1
* i965: Prevent implicit upcasts to brw_reg.Matt Turner2015-11-241-1/+2
* i965: Use scope operator to ensure brw_reg is interpreted as a type.Matt Turner2015-11-241-1/+1
* i965: Add and use backend_reg::equals().Matt Turner2015-11-241-2/+1
* i965: Use nir_lower_tex for texture coordinate loweringJason Ekstrand2015-11-231-0/+4
* i965: Move postprocess_nir to codegen timeJason Ekstrand2015-11-231-2/+9
* i965/fs: print non-1 strides when dumping instructionsConnor Abbott2015-11-231-0/+12
* i965/fs: Replace fs_reg(imm) constructors with brw_imm_*().Matt Turner2015-11-191-74/+26
* i965: Allow indirect GS input indexing in the scalar backend.Kenneth Graunke2015-11-181-17/+0
* i965: Add assertion for src_stencil payload sizeBen Widawsky2015-11-171-0/+6
* i965: Introduce a MOV_INDIRECT opcode.Kenneth Graunke2015-11-141-0/+28
* i965: Add a SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT opcode.Kenneth Graunke2015-11-131-0/+2
* i965: Make convert_attr_sources_to_hw_regs handle stride == 0.Kenneth Graunke2015-11-131-1/+2
* i965: Combine register file field.Matt Turner2015-11-131-3/+2
* i965: Replace HW_REG with ARF/FIXED_GRF.Matt Turner2015-11-131-67/+53
* i965/fs: Set stride correctly for immediates in fs_reg(brw_reg).Matt Turner2015-11-131-0/+6
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