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	Commit message (Expand)	Author	Age	Files	Lines
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*	i965/disasm: "Handle" Gen8+ HF/DF immediate cases.	Kenneth Graunke	2014-06-30	1	-0/+7
*	i965/disasm: Cut piles of duplicate swizzle printing.	Kenneth Graunke	2014-06-30	1	-89/+26
*	i965/disasm: Properly decode negate source modifiers on Broadwell.	Kenneth Graunke	2014-06-30	1	-4/+49
*	i965/disasm: Improve disassembly of atomic messages on Haswell+.	Kenneth Graunke	2014-06-30	1	-7/+21
*	i965/disasm: Actually disassemble Gen7+ URB opcodes.	Kenneth Graunke	2014-06-30	1	-3/+19
*	i965/disasm: Decode Broadwell's invm/rsqrtm math functions.	Kenneth Graunke	2014-06-30	1	-0/+2
*	i965/disasm: Properly disassemble the "atomic" ThreadCtrl value.	Kenneth Graunke	2014-06-30	1	-2/+3
*	i965/disasm: Properly disassemble all32h/any32h align1 predicates.	Kenneth Graunke	2014-06-30	1	-11/+13
*	i965/disasm: Mark ELSE as having UIP on Gen8+.	Kenneth Graunke	2014-06-30	1	-0/+1
*	i965/disasm: Properly disassemble jump targets on Gen4-5.	Kenneth Graunke	2014-06-30	1	-0/+15
*	i965/disasm: Improve disassembly of jump targets on Gen6+.	Kenneth Graunke	2014-06-30	1	-18/+41
*	i965/disasm: Add support for new Gen8+ register types.	Kenneth Graunke	2014-06-30	1	-16/+24
*	i965: Restyle brw_disasm.c.	Kenneth Graunke	2014-06-30	1	-1234/+1231
*	i965/disasm: Create an "opcode" temporary.	Kenneth Graunke	2014-06-30	1	-31/+30
*	i965/disasm: Eliminate opcode pointer.	Kenneth Graunke	2014-06-30	1	-8/+7
*	i965: Disassemble all of DP write message control bits on Gen6.	Kenneth Graunke	2014-06-26	1	-1/+1
*	i965: Replace 'struct brw_instruction' with 'brw_inst'.	Matt Turner	2014-06-26	1	-19/+11
*	i965: Convert brw_disasm.c to the new brw_inst API.	Matt Turner	2014-06-26	1	-341/+316
*	i965: Pass brw rather than gen to brw_disassemble_inst().	Matt Turner	2014-06-26	1	-27/+27
*	i965/disasm: Mark three_source_reg_encoding[] static.	Matt Turner	2014-06-17	1	-1/+1
*	i965: Don't include mtypes.h in brw_disasm.c	Kristian Høgsberg	2014-06-09	1	-2/+0
*	i965: Rename brw_disasm/gen8_disassemble to brw/gen8_disassemble_inst.	Kenneth Graunke	2014-05-18	1	-1/+3
*	i965/disasm: Align send instruction meta-information with dst.	Matt Turner	2014-05-15	1	-0/+1
*	i965/disasm: Disassemble the compaction control bit.	Matt Turner	2014-05-15	1	-1/+8
*	i965/disasm: Fix s/xoo/xor/ typo.	Matt Turner	2014-04-22	1	-1/+1
*	i965/disasm: Remove tables with obvious mappings.	Matt Turner	2014-04-22	1	-10/+1
*	i965: Fill in a bunch of gen7/hsw data cache-related disasm.	Eric Anholt	2014-04-11	1	-7/+103
*	i965: Fix register types in dump_instructions(), again.	Kenneth Graunke	2014-03-14	1	-1/+1
*	i965: Disassemble 3 src instructions' rep_ctrl field.	Matt Turner	2014-03-10	1	-3/+12
*	i965: Disassemble 3-src operands widths' correctly.	Matt Turner	2014-03-10	1	-3/+3
*	i965: Abstract BRW_REGISTER_TYPE_* into an enum with unique values.	Kenneth Graunke	2013-12-20	1	-8/+8
*	i965: Decode three-source register types directly.	Kenneth Graunke	2013-12-20	1	-25/+14
*	i965: Disassemble UV types, not UB types.	Kenneth Graunke	2013-12-20	1	-2/+2
*	i965: Don't use GL types in files shared with intel-gpu-tools.	Kenneth Graunke	2013-12-05	1	-41/+41
*	i965: Externalize conditional_modifier for use in dump_instruction().	Matt Turner	2013-12-04	1	-1/+1
*	i965: Externalize reg_encoding for use in dump_instruction().	Matt Turner	2013-12-04	1	-1/+1
*	i965: Fix disassembled names of BFI1 and BFI2 instructions.	Matt Turner	2013-11-20	1	-2/+2
*	i965: Generate code for ir_binop_carry and ir_binop_borrow.	Matt Turner	2013-10-07	1	-0/+2
*	i965: Add support for emitting and disassembling bit instructions.	Matt Turner	2013-05-06	1	-0/+7
*	i965: Print the correct dst and shared-src types for 3-src instructions.	Matt Turner	2013-05-06	1	-4/+22
*	i965: Remove traces of nonexistent TAN math function.	Matt Turner	2013-04-24	1	-1/+1
*	i965: Add support for emitting the LRP instruction.	Kenneth Graunke	2013-02-28	1	-0/+1
*	i965: Add opcodes for F32TO16 and F16TO32	Chad Versace	2013-01-24	1	-0/+2
*	i965/disasm: Fix horizontal stride of dest registers	Chad Versace	2013-01-24	1	-3/+6
*	i965: Fix disassembly of jump targets on Gen7.	Kenneth Graunke	2012-12-12	1	-4/+9
*	i965: Print the flag reg updated by conditional modifiers.	Eric Anholt	2012-12-11	1	-1/+15
*	i965: Add the new flag_reg_nr instruction field from IVB.	Eric Anholt	2012-12-11	1	-1/+1
*	i965: Correct the name and usage of the flag subregister number field.	Eric Anholt	2012-12-11	1	-2/+2
*	i965/vs: Add a little bit of IR-level debug ability.	Eric Anholt	2012-10-17	1	-5/+2
*	i965: Mark brw_disasm.c tables as static const.	Eric Anholt	2012-09-27	1	-56/+44