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path: root/src/mesa/drivers/dri/i965/brw_disasm.c
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* i965: Add support for emitting and disassembling bit instructions.Matt Turner2013-05-061-0/+7
* i965: Print the correct dst and shared-src types for 3-src instructions.Matt Turner2013-05-061-4/+22
* i965: Remove traces of nonexistent TAN math function.Matt Turner2013-04-241-1/+1
* i965: Add support for emitting the LRP instruction.Kenneth Graunke2013-02-281-0/+1
* i965: Add opcodes for F32TO16 and F16TO32Chad Versace2013-01-241-0/+2
* i965/disasm: Fix horizontal stride of dest registersChad Versace2013-01-241-3/+6
* i965: Fix disassembly of jump targets on Gen7.Kenneth Graunke2012-12-121-4/+9
* i965: Print the flag reg updated by conditional modifiers.Eric Anholt2012-12-111-1/+15
* i965: Add the new flag_reg_nr instruction field from IVB.Eric Anholt2012-12-111-1/+1
* i965: Correct the name and usage of the flag subregister number field.Eric Anholt2012-12-111-2/+2
* i965/vs: Add a little bit of IR-level debug ability.Eric Anholt2012-10-171-5/+2
* i965: Mark brw_disasm.c tables as static const.Eric Anholt2012-09-271-56/+44
* i965: Add disasm for gen6+ UIP/JIP on BREAK/CONT/HALT.Eric Anholt2012-03-161-0/+4
* i965: Add support for the MAD opcode on gen6+.Eric Anholt2012-02-101-18/+205
* i965: Fix disassembly of data port writes on Ivybridge.Kenneth Graunke2012-01-181-1/+12
* i965: Fix disassembly of sampler messages on Ivybridge.Kenneth Graunke2012-01-181-1/+7
* i965: Add sensible disasm for the JMPI instruction.Eric Anholt2012-01-061-1/+3
* i965: Disassemble Ivybridge Data Port/Data Cache messages.Kenneth Graunke2011-10-181-0/+8
* i965: Rename pixel_scoreboard_clear to last_render_target for clarity.Kenneth Graunke2011-10-181-1/+1
* i965: Remove duplicate copies of mlen & rlen from instruction decode.Kenneth Graunke2011-10-181-13/+4
* i965: Rename BRW_MESSAGE_TARGET_* to BRW_SFID_* and document them.Kenneth Graunke2011-10-181-24/+25
* i965: Fix disassembly for intdiv/intmod math functions.Kenneth Graunke2011-09-071-2/+2
* i965: Add gen6 disassembly for DP render cache messages.Eric Anholt2011-08-161-3/+46
* i965: Rename dp_render_target struct to gen6_dp.Kenneth Graunke2011-05-131-12/+12
* i965: Correct the dp_read message descriptor setup on g4x.Eric Anholt2010-12-231-1/+1
* i965: Dump the WHILE jump distance on gen6.Eric Anholt2010-12-011-1/+2
* i965: Add disasm for the flag register.Eric Anholt2010-10-261-0/+3
* i965: Use SENDC on the first render target write on gen6.Eric Anholt2010-10-261-3/+7
* i965: Add some clarification of the WECtrl field.Eric Anholt2010-10-061-2/+2
* i965: Fix up IF/ELSE/ENDIF for gen6.Eric Anholt2010-10-061-0/+5
* i965: In disasm, gen6 fb writes don't put msg reg # in destreg_conditionalmod.Eric Anholt2010-10-041-1/+1
* i965: disasm quarter and write enable instruction control on sandybridgeZhenyu Wang2010-09-281-9/+61
* i965: Add disasm for gen5 sampler messages.Eric Anholt2010-08-281-6/+19
* i965: Add AccWrCtl support on Sandybridge.Zhenyu Wang2010-08-201-0/+7
* i965: Mention the mlen and rlen for URB reads.Zhenyu Wang2010-08-201-0/+5
* i965: Adjust disasm of subreg numbers to be in units of the register type.Zhenyu Wang2010-08-201-6/+20
* i965: Add disasm for Compr4 instruction compression.Eric Anholt2010-08-161-1/+16
* i965: Fix the disasm output for da16 src widths.Eric Anholt2010-07-221-1/+1
* i965: Add disasm for dataport reads (register unspilling).Eric Anholt2010-07-211-1/+22
* i965: Add disasm for SEND mlen/rlen on Sandybridge.Eric Anholt2010-07-081-1/+1
* i965: Fix disasm of a SEND's mlen and rlen on Ironlake.Eric Anholt2010-07-081-4/+11
* i965: Add decode for Sandybridge DP write messages.Zhenyu Wang2010-07-081-9/+21
* i965: Parse the ff_sync URB send opcode on Ironlake disasm.Eric Anholt2010-05-141-1/+15
* i965: Dump out the correct shared function for SEND on Ironlake.Eric Anholt2010-05-141-3/+11
* i965: Add disasm for SNB MATH opcode.Eric Anholt2010-03-221-1/+6
* i965: Use the PLN instruction when possible in interpolation.Eric Anholt2010-03-101-0/+1
* i965: Print the offset for IFF in disasmEric Anholt2010-03-101-1/+1
* i965: Print the offsets for WHILE and BREAK in disasm.Eric Anholt2010-03-091-2/+2
* Merge branch 'mesa_7_7_branch'Brian Paul2009-12-311-0/+1
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| * i965: Add missing va_end.Vinson Lee2009-12-241-0/+1
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